參數(shù)資料
型號: MX98727
英文描述: SINGLE CHIP PCI/CARDBUS FAST ETHERNET CONTROLLER
中文描述: 單芯片的PCI / CARDBUS快速以太網(wǎng)控制器
文件頁數(shù): 41/71頁
文件大?。?/td> 389K
代理商: MX98727
41
P/N:PM0723
REV. 1.0, JUL. 13, 2000
MX98728EC
4.4 Network Address Filtering
The first bit of the destination address signifies whether it is a physical address or a multicast address. The receive
MAC filters the frame based on the address filtering option described below. Register 01h ( NCRB ) bit 0 is PR (
Promiscuous mode ) and bit 2 is PM ( Pass Multicast ). They are used to control the desired address filtering options.
Possible Address Filtering Options ( all independent of each other )
Option
1
2
3
4
5
Description
One physical address perfect filtering , always enabled.
Unlimited multicast addresses imperfect filtering using the hash table.
Pass all multicast addresses.
Promiscuous Ethernet reception. When set, all valid frames are received.
Length field redefined as to be match against all broadcast packets. If matched, this broadcast packet
is received.
If the frame address passes the network address filter, the receive MAC removes the preamble and delivers the
frame to the host processor memory. However, if the address does not pass the filter when mismatch is recognized,
the receive MAC terminates this reception.
GMAC Network Address Filtering
(NOTE1) Broadcast packet is not filtered by hash table array.
(NOTE1)
Address
Match
Logic
Selected Bit
"0"=reject,"1"=accept
NCRB.AB
NCRB.PB
NCRB.PM
NCRB.PR
RX address match
ID Compare
incoming
MAC ID
Index
32 Bit CRC
31
26
0
Destination Address
47
0
0
1
PAR0-PAR5
MAC ID
Hash Table Array
MAR0-MAR7
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