參數(shù)資料
型號： M66291GP
元件分類： 總線控制器
英文描述： UNIVERSAL SERIAL BUS CONTROLLER, PQFP48
封裝： 7 X 7 MM, 0.50 MM PITCH, PLASTIC, LQFP-48
文件頁數(shù)： 89/128頁
文件大?。?/td> 928K
代理商： M66291GP
M66291GP/HP
Rev 1.01 2004.11.01 page 61 of 122
2.30 SIE_FIFO Status Register
SIE_FIFO Status Register (SIE_FIFO_STATUS)
<Address : H’46>
b15
14
13
12
11
10
9876
54321
b0
TGL
SCLR
Sreq
SIE_DTLN
0
000
000000
0
00000
-
---
------
-
--
------
<H/W reset : H'0000>
<S/W reset : ->
<USB bus reset : ->
b
Bit name
Function
R
W
15~14
Reserved. Set it to “0”.
00
13
TGL
Buffer Toggle
<When set to OUT buffer>
Write
0 :
Invalid (Ignored when written)
1 :
Forces the buffer to toggle in receive ready state to read
ready state
<When set to IN buffer>
Write
0 :
Invalid (Ignored when written)
1 :
Inhibited
0
12
SCLR
Buffer Clear
<When set to OUT buffer>
Write
0 :
Invalid
1 :
Inhibited
<When set to IN buffer>
0 :
Invalid (Ignored when written)
1 :
Clears the buffer in transmit ready state
0
11
Sreq
SIE_FIFO Ready
0 :
Enables to be write to TGL bit/SCLR bit
1 :
Disables to be write to TGL bit/SCLR bit
×
10~0
SIE_DTLN
SIE_FIFO Receive Data Length
Receive data length of SIE internal FIFO
×
This register is valid against the endpoint set by the CPU_EP bits.
(1) TGL (Buffer Toggle) Bit (b13)
This bit is valid against the endpoint set to the OUT buffer (EPi_DIR bit = “0”) and is used for continuous
transmit/receive mode (EPi_RWMD = “1”). Do not write “1” when set to the IN buffer (EPi_DIR bit = “1”)
When “1” is written to this bit, the SIE side buffer is forced to complete receiving. The buffer is toggled,
irrespective of the presence/absence of the CPU side buffer data (causing the SIE side buffer to complete
receiving and to get toggled, and the IVAL bit to set to “1”). Make sure that the buffer data in the CPU side are
not cleared.
Here, the EPB_RDY bit also is set to “1” (buffer ready interrupt occurs).
Note:
Refer to “3.2 FIFO Buffer” for CPU/SIE side.
Note:
Make sure that the response PID is set to NAK (EPi_PID bits = “00”) and the Sreq bit to “0” before writing “1” to
this bit.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M66291GP#201 制造商:Renesas Electronics Corporation 功能描述:IC ASSP USB2.0 DEVICE CONTROLLER 48LQFP
M66291GP#RB0S 功能描述:IC USB CONTROLLER GEN-PUR 48LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A
M66291GPRB0S 制造商:Renesas Electronics Corporation 功能描述:USB2.0 Device Controller,LQFP48
M66291HP 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:ASSP (USB2.0 Device Controller)
M66291HP#200D 功能描述:IC USB CONTROLLER GEN-PUR 52VQFN RoHS:否 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A
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