參數(shù)資料
型號： M66291GP
元件分類： 總線控制器
英文描述： UNIVERSAL SERIAL BUS CONTROLLER, PQFP48
封裝： 7 X 7 MM, 0.50 MM PITCH, PLASTIC, LQFP-48
文件頁數(shù)： 57/128頁
文件大?。?/td> 928K
代理商： M66291GP
M66291GP/HP
Rev 1.01 2004.11.01 page 32 of 122
Powered
state
(D VSQ bits ="000")
SET _AD DRESS excecution
(W hen SADR bit="1", DVST bit is set to "1")
USB bus reset detection
(W hen U RST bit="1", DVST bit is set to "1")
Resume (RESM bit is set to "1")
Default
state
(D VSQ bits="001")
Configured
state
(D VSQ bits="011")
Suspended
state
(D VSQ bits="100")
Address
state
(D VSQ bits="010")
Suspended
state
(D VSQ bits="111")
Suspended
state
(D VSQ bits="101")
Suspended
state
(D VSQ bits="110")
Suspend detection
(W hen SUSP bit="1", DVST bit is set to "1")
Resume (RESM bit is set to "1")
SET _CO NFIG URAT IO N excecution[ConfigurationValue=0]
(
W hen SCFG bit="1", D VST bit is set to "1")
Suspend detection
(W hen SUSP bit="1", DVST bit is set to "1")
Resume (RESM bit is set to "1")
Suspend detection
(W hen SUSP bit="1", DVST bit is set to "1")
Suspend detection
(W hen SUSP bit="1", D VST bit is set to "1")
Resume (RESM bit is set to "1")
USB bus reset detection
(W hen UR ST bit="1", DVST bit is set to "1")
Note : T he URST , SADR , SCFG and SUSP bits (Interrupt Enable Register 0) in the parenthesis set enable/disable to set the DVST bit to "1" for the
corresponding stage transition. T here is no bit to set enable/disable to set the RESM bit to "1".
T he stage transition takes place even if these bits are inhibited to set to "1".
SET _CO NFIG U RAT IO N excecution[ConfigurationValue= 0]
(W hen SCFG bit="1", DVST bit is set to "1")
/
Figure 2.6 Device State Transition
(11) VALID (Setup Packet Detect) Bit (b3)
This bit indicates that the setup token has been received.
When the setup token is completely received, this bit is set to “1”.
When this bit is set to “1”, the writing to EP0_PID/CCPL bits of EP0_FIFO Control Register is ignored.
At the time of receiving the setup token, the interrupt has not occurred (the interrupt occurs only after the
termination of setup stage).
This bit is cleared to “0” by writing “0”.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M66291GP#201 制造商:Renesas Electronics Corporation 功能描述:IC ASSP USB2.0 DEVICE CONTROLLER 48LQFP
M66291GP#RB0S 功能描述:IC USB CONTROLLER GEN-PUR 48LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標準包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A
M66291GPRB0S 制造商:Renesas Electronics Corporation 功能描述:USB2.0 Device Controller,LQFP48
M66291HP 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:ASSP (USB2.0 Device Controller)
M66291HP#200D 功能描述:IC USB CONTROLLER GEN-PUR 52VQFN RoHS:否 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標準包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A
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