參數(shù)資料
型號： M66291GP
元件分類： 總線控制器
英文描述： UNIVERSAL SERIAL BUS CONTROLLER, PQFP48
封裝： 7 X 7 MM, 0.50 MM PITCH, PLASTIC, LQFP-48
文件頁數(shù)： 109/128頁
文件大小： 928K
代理商： M66291GP
M66291GP/HP
Rev 1.01 2004.11.01 page 79 of 122
2.40 Epi Configuration Registers 1 (i=1~6)
EP1 Configuration Register 1 (EP1_1CONFIG)
<Address : H’62>
EP2 Configuration Register 1 (EP2_1CONFIG)
<Address : H’66>
EP3 Configuration Register 1 (EP3_1CONFIG)
<Address : H’6A>
EP4 Configuration Register 1 (EP4_1CONFIG)
<Address : H’6E>
EP5 Configuration Register 1 (EP5_1CONFIG)
<Address : H’72>
EP6 Configuration Register 1 (EP6_1CONFIG)
<Address : H’76>
b15
14
13
12
11
10
9876
54321
b0
EPi_PID
EPi_
NULMD
EPi_
ACLR
EPi_
Octl
EPi_MXPS
00
000001
0
00000
--
------
--
-
------
<H/W reset : H'0040>
<S/W reset : ->
<USB bus reset : ->
b
Bit name
Function
R
W
15~14
EPi_PID
Response PID
00 : NAK
01 : BUF
(Transmits response PID/data according to the state of
buffer etc,)
1x : STALL
13
Reserved. Set it to “0”.
00
12
EPi_NULMD
Zero-Length Packet Addtion Transmit Mode
0 :
Disable to transmit zero-length packet automatically
1 :
Enable to transmit zero-length packet automatically
11
EPi_ACLR
OUT Buffer Automatic Clear Mode
0 :
Exit buffer clear mode
1 :
Buffer clear mode
Make sure to set “0” after setting “1”.
10
EPi_Octl
Register 8-Bit Mode
0 :
CPU/Dn_FIFO Data Register is 16-bit mode
1 :
CPU/Dn_FIFO Data Register is 8-bit mode
9~0
EPi_MXPS
Maximum Packet Size
Upper size limit of the data transmitted/received in one packet
Interrupt transfer
:0~64
Bulk transfer
:only 8,16,32 and 64
Isochronous transfer
:0~1023
(1) EPi_PID (Response PID) Bits (b15~b14)
These bits set the PID to be responded to the host.
These bits are valid only when the transfer type is set to bulk transfer mode or interrupt transfer mode
(EPi_TYP bits = “01” or “10”). Set these bits to “01” at isochronous transfer mode (EPi_TYP bits = “11”).
When these bits are set to “00”, the NAK response is executed, regardless of the buffer state.
When these bits are set to “01”;
<When set to OUT buffer (EPi_DIR bit = “0”)>
ACK response after receiving the data with the SIE side buffer in the receive ready state.
NAK response with the SIE side buffer in the receive not ready state.
When the SIE side buffer is not in receive ready state, if the OUT token is received, the
EPB_NRD bit is set to “1”.
<When set to IN buffer (EPi_DIR bit = “1”)>
Transmits the data with the SIE side buffer in transmit ready state.
NAK response with the SIE side buffer not in the transmit ready state.
When the SIE side buffer is in the transmit not ready state, if the IN token is received, the
EPB_NRD bit is set to “1”.
When these bits are set to “1x”, the STALL response is executed, regardless of the buffer state.
When set to OUT buffer, if a data exceeding the maximum packet size is received, regardless of these bit
values, these bits are set automatically to “1x” (STALL).
(2) EPi_NULMD (Zero-Length Packet Addtion Transmit Mode) Bit (b12)
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相關代理商/技術參數(shù)
參數(shù)描述
M66291GP#201 制造商:Renesas Electronics Corporation 功能描述:IC ASSP USB2.0 DEVICE CONTROLLER 48LQFP
M66291GP#RB0S 功能描述:IC USB CONTROLLER GEN-PUR 48LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標準包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應商設備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A
M66291GPRB0S 制造商:Renesas Electronics Corporation 功能描述:USB2.0 Device Controller,LQFP48
M66291HP 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:ASSP (USB2.0 Device Controller)
M66291HP#200D 功能描述:IC USB CONTROLLER GEN-PUR 52VQFN RoHS:否 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標準包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應商設備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A
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