參數(shù)資料
型號： M30L0T8000B0ZAQE
廠商： STMICROELECTRONICS
元件分類： PROM
英文描述： 16M X 16 FLASH 1.8V PROM, 85 ns, PBGA88
封裝： 8 X 10 MM, 0.80 MM PITCH, LEAD FREE, BGA-88
文件頁數(shù)： 83/103頁
文件大?。?/td> 794K
代理商： M30L0T8000B0ZAQE
Common Flash Interface
M30L0T8000T0, M30L0T8000B0
Table 41.
Protection Register Information
Offset
Data
Description
Value
(P+E)h = 118h
0002h
Number of protection register fields in JEDEC ID space.
0000h indicates that 256 fields are available.
2
(P+F)h = 119h
0080h
Protection Field 1: Protection Description
Bits 0-7 Lower byte of protection register address
Bits 8-15 Upper byte of protection register address
Bits 16-23 2n bytes in factory pre-programmed region
Bits 24-31 2n bytes in user programmable region
80h
(P+10)h = 11Ah
0000h
00h
(P+ 11)h = 11Bh
0003h
8 Bytes
(P+12)h = 11Ch
0003h
8 Bytes
(P+13)h = 11Dh
0089h
Protection Register 2: Protection Description
Bits 0-31 protection register address
Bits 32-39 n number of factory programmed regions (lower
byte)
Bits 40-47 n number of factory programmed regions (upper
byte)
Bits 48-55 2n bytes in factory programmable region
Bits 56-63 n number of user programmable regions (lower
byte)
Bits 64-71 n number of user programmable regions (upper
byte)
Bits 72-79 2n bytes in user programmable region
89h
(P+14)h = 11Eh
0000h
00h
(P+15)h = 11Fh
0000h
00h
(P+16)h = 120h
0000h
00h
(P+17)h = 121h
0000h
0
(P+18)h = 122h
0000h
0
(P+19)h = 123h
0000h
0
(P+1A)h = 124h
0010h
16
(P+1B)h = 125h
0000h
0
(P+1C)h = 126h
0004h
16
Table 42.
Burst Read Information
Offset
Data
Description
Value
(P+1D)h = 127h
0004h
Page-mode read capability
bits 0-7 ’n’ such that 2n HEX value represents the number of
read-page bytes. See offset 0028h for device word width to
determine page-mode data output width.
16
Bytes
(P+1E)h = 128h
0004h
Number of synchronous mode read configuration fields that
follow.
4
(P+1F)h = 129h
0001h
Synchronous mode read capability configuration 1
bit 3-7 Reserved
bit 0-2 ’n’ such that 2n+1 HEX value represents the maximum
number of continuous synchronous reads when the device is
configured for its maximum word width. A value of 07h
indicates that the device is capable of continuous linear bursts
that will output data until the internal burst counter reaches the
end of the device’s burstable address space. This field’s 3-bit
value can be written directly to the read configuration register
bit 0-2 if the device is configured for its maximum word width.
See offset 0028h for word width to determine the burst data
output width.
4
(P+20)h = 12Ah
0002h
Synchronous mode read capability configuration 2
8
(P-21)h = 12Bh
(P+22)h = 12Ch
0003h
0007h
Synchronous mode read capability configuration 3
16
Synchronous mode read capability configuration 4
Cont.
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