參數(shù)資料
型號(hào)： M30L0T8000B0ZAQE
廠商： STMICROELECTRONICS
元件分類： PROM
英文描述： 16M X 16 FLASH 1.8V PROM, 85 ns, PBGA88
封裝： 8 X 10 MM, 0.80 MM PITCH, LEAD FREE, BGA-88
文件頁(yè)數(shù)： 79/103頁(yè)
文件大小： 794K
代理商： M30L0T8000B0ZAQE
M30L0T8000T0, M30L0T8000B0
Common Flash Interface
77/103
Table 37.
CFI Query Identification String
Offset
Sub-section Name
Description
Value
000h
0020h
Manufacturer Code
ST
001h
880Dh
880Eh
Device Code
Top
Bottom
002h-00Fh
Reserved
010h
0051h
Query Unique ASCII String "QRY"
"Q"
011h
0052h
"R"
012h
0059h
"Y"
013h
0001h
Primary Algorithm Command Set and Control
Interface ID code 16 bit ID code defining a specific
algorithm
014h
0000h
015h
offset = P = 000Ah Address for Primary Algorithm extended Query table
(see Table 40)
P = 10Ah
016h
0001h
017h
0000h
Alternate Vendor Command Set and Control Interface
ID Code second vendor - specified algorithm
supported
NA
018h
0000h
019h
value = A = 0000h
Address for Alternate Algorithm extended Query table
NA
01Ah
0000h
Table 38.
CFI Query System Interface Information
Offset
Data
Description
Value
01Bh
0017h
VDD Logic Supply Minimum Program/Erase or Write voltage
bit 7 to 4 BCD value in volts
bit 3 to 0 BCD value in 100 millivolts
1.7V
01Ch
0020h
VDD Logic Supply Maximum Program/Erase or Write voltage
bit 7 to 4 BCD value in volts
bit 3 to 0 BCD value in 100 millivolts
2V
01Dh
0085h
VPP [Programming] Supply Minimum Program/Erase voltage
bit 7 to 4 HEX value in volts
bit 3 to 0 BCD value in 100 millivolts
8.5V
01Eh
0095h
VPP [Programming] Supply Maximum Program/Erase voltage
bit 7 to 4 HEX value in volts
bit 3 to 0 BCD value in 100 millivolts
9.5V
01Fh
0008h
Typical time-out per single byte/word program = 2n s
256s
020h
0009h
Typical time-out for Buffer Program = 2n s
512s
021h
000Ah
Typical time-out per individual block erase = 2n ms
1s
022h
0000h
Typical time-out for full chip erase = 2n ms
NA
023h
0001h
Maximum time-out for word program = 2n times typical
512s
024h
0001h
Maximum time-out for Buffer Program = 2n times typical
1024s
025h
0002h
Maximum time-out per individual block erase = 2n times typical
4s
026h
0000h
Maximum time-out for chip erase = 2n times typical
NA
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