參數(shù)資料
型號： M30L0T8000B0ZAQE
廠商： STMICROELECTRONICS
元件分類： PROM
英文描述： 16M X 16 FLASH 1.8V PROM, 85 ns, PBGA88
封裝： 8 X 10 MM, 0.80 MM PITCH, LEAD FREE, BGA-88
文件頁數(shù)： 65/103頁
文件大小： 794K
代理商： M30L0T8000B0ZAQE
DC and AC parameters
M30L0T8000T0, M30L0T8000B0
1.
Sampled only, not 100% tested.
2.
tWHEL has these values when reading in the targeted bank or when reading following a Set Configuration
Register command. System designers should take this into account and may insert a software No-Op
instruction to delay the first read in the same bank after issuing any command and to delay the first read to
any address after issuing a Set Configuration Register command. If the first read after the command is a
Read Array operation in a different bank and no changes to the Configuration Register have been issued,
tWHEL is 0ns.
3.
Meaningful only if L is always kept low.
Table 25.
Write AC Characteristics, Write Enable Controlled
Symbol
Alt
Parameter
M30L0T8000T0/B0
Unit
85
Wr
it
e
Ena
b
le
Con
tro
lled
Timing
s
tAVAV
tWC Address Valid to Next Address Valid
Min
85
ns
tAVLH
Address Valid to Latch Enable High
Min
10
ns
tAVWH
(3)
Address Valid to Write Enable High
Min
50
ns
tDVWH
tDS Data Valid to Write Enable High
Min
50
ns
tELLH
Chip Enable Low to Latch Enable High
Min
10
ns
tELWL
tCS Chip Enable Low to Write Enable Low
Min
0
ns
tELQV
Chip Enable Low to Output Valid
Min
85
ns
tELKV
Chip Enable Low to Clock Valid
Min
9
ns
tGHWL
Output Enable High to Write Enable Low
Min
17
ns
tLHAX
Latch Enable High to Address Transition
Min
9
ns
tLLLH
Latch Enable Pulse Width
Min
10
ns
tWHAV
(3)
Write Enable High to Address Valid
Min
0
ns
tWHAX
(3)
tAH Write Enable High to Address Transition
Min
0
ns
tWHDX
tDH Write Enable High to Input Transition
Min
0
ns
tWHEH
tCH Write Enable High to Chip Enable High
Min
0
ns
tWHEL
(2)
Write Enable High to Chip Enable Low
Min
25
ns
tWHGL
Write Enable High to Output Enable Low
Min
0
ns
tWHLL
Write Enable High to Latch Enable Low
Min
0
ns
tWHWL
tWPH Write Enable High to Write Enable Low
Min
25
ns
tWLWH
tWP Write Enable Low to Write Enable High
Min
50
ns
Protection
Timing
s
tQVVPL
Output (Status Register) Valid to VPP
Low
Min
0
ns
tQVWPL
Output (Status Register) Valid to Write
Protect Low
Min
0
ns
tVPHWH
tVPS VPP High to Write Enable High
Min
200
ns
tWHVPL
Write Enable High to VPP Low
Min
200
ns
tWHWPL
Write Enable High to Write Protect Low
Min
200
ns
tWPHWH
Write Protect High to Write Enable High
Min
200
ns
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