參數(shù)資料
型號: M30L0T8000B0ZAQE
廠商: STMICROELECTRONICS
元件分類: PROM
英文描述: 16M X 16 FLASH 1.8V PROM, 85 ns, PBGA88
封裝: 8 X 10 MM, 0.80 MM PITCH, LEAD FREE, BGA-88
文件頁數(shù): 24/103頁
文件大?。?/td> 794K
代理商: M30L0T8000B0ZAQE
M30L0T8000T0, M30L0T8000B0
Command interface
27/103
4.16
Set Configuration Register Command
The Set Configuration Register command is used to write a new value to the Configuration
Register.
Two Bus Write cycles are required to issue the Set Configuration Register command.
The first cycle sets up the Set Configuration Register command and the address
corresponding to the Configuration Register content.
The second cycle writes the Configuration Register data and the confirm command.
The Configuration Register data must be written as an address during the bus write cycles,
that is A0 = CR0, A1 = CR1, …, A15 = CR15. Addresses A16- A23 are ignored.
Read operations output the array content after the Set Configuration Register command is
issued.
The Read Electronic Signature command is required to read the updated contents of the
Configuration Register.
4.17
Block Lock Command
The Block Lock command is used to lock a block and prevent program or erase operations
from changing the data in it. All blocks are locked after power-up or reset.
Two Bus Write cycles are required to issue the Block Lock command.
The first bus cycle sets up the Block Lock command.
The second Bus Write cycle latches the block address and locks the block.
The lock status can be monitored for each block using the Read Electronic Signature
command. Table 16 shows the Lock Status after issuing a Block Lock command.
Once set, the Block Lock bits remain set even after a hardware reset or power-down/power-
up. They are cleared by a Block Unlock command.
Refer to the section, Block Locking, for a detailed explanation. See Appendix C, Figure 23:
Locking Operations Flowchart and Pseudo Code, for a flowchart for using the Lock
command.
4.18
Block Unlock Command
The Block Unlock command is used to unlock a block, allowing the block to be programmed
or erased.
Two Bus Write cycles are required to issue the Block Unlock command.
The first bus cycle sets up the Block Unlock command.
The second Bus Write cycle latches the block address and unlocks the block.
The lock status can be monitored for each block using the Read Electronic Signature
command. <Blue>Table 16. shows the protection status after issuing a Block Unlock
command.
Refer to the section, Block Locking, for a detailed explanation and Appendix C, Figure 23:
Locking Operations Flowchart and Pseudo Code, for a flowchart for using the Block Unlock
command.
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