Under
development
Preliminary Specifications REV.B3
Specifications in this manual are tentative and subject to change.
Mitsubishi Microcomputers
M32C/83 group
SINGLE-CHIP 16/32-BIT CMOS MICROCOMPUTER
Clock synchronous serial I/O mode
177
(1) Clock synchronous serial I/O mode
The clock synchronous serial I/O mode uses a transfer clock to transmit and receive data. Tables 1.18.1
and 1.18.2 list the specifications of the clock synchronous serial I/O mode.
Table 1.18.1. Specifications of clock synchronous serial I/O mode (1/2)
Item
Specification
Transfer data format
Transfer data length: 8 bits
Transfer clock
When internal clock is selected (bit 3 at addresses 036816, 02E816, 033816, 032816,
02F816 = “0”) : fi/ 2(m+1) (Note 1)
fi = f1, f8, f2n
_ CLK is selected by the corresponding peripheral function select register A, B and C.
When external clock is selected (bit 3 at addresses 036816, 02E816, 033816 , 032816,
02F816= “1”) : Input from CLKi pin
_ Set the corresponding function select register A to I/O port
Transmission/reception control
_______
CTS function/RTS function/CTS, RTS function chosen to be invalid
Transmission start condition
To start transmission, the following requirements must be met:
_ Transmit enable bit (bit 0 at addresses 036D16, 02ED16, 033D16, 032D16, 02FD16) = “1”
_ Transmit buffer empty flag (bit 1 at addresses 036D16, 02ED16, 033D16, 032D16, 02FD16) = “0”
_______
_ When CTS function selected, CTS input level = “L”
_ TxD output is selected by the corresponding peripheral function select register A, B and C.
Furthermore, if external clock is selected, the following requirements must also be met:
_ CLKi polarity select bit (bit 6 at addresses 036C16, 02EC16, 033C16, 032C16,
02FC16) = “0”: CLKi input level = “H”
_ CLKi polarity select bit (bit 6 at addresses 036C16, 02EC16, 033C16, 032C16,
02FC16) = “1”: CLKi input level = “L”
Reception start condition
To start reception, the following requirements must be met:
_ Receive enable bit (bit 2 at addresses 036D16, 02ED16, 033D16, 032D16, 02FD16) = “1”
_ Transmit enable bit (bit 0 at addresses 036D16, 02ED16, 033D16, 032D16, 02FD16) = “1”
_ Transmit buffer empty flag (bit 1 at addresses 036D16, 02ED16, 033D16, 032D16, 02FD16) = “0”
Furthermore, if external clock is selected, the following requirements must also be met:
_ CLKi polarity select bit (bit 6 at addresses 036C16, 02EC16, 033C16, 032C16,
02FC16) = “0”: CLKi input level = “H”
_ CLKi polarity select bit (bit 6 at addresses 036C16, 02EC16, 033C16, 032C16,
02FC16) = “1”: CLKi input level = “L”
When transmitting
_ Transmit interrupt cause select bit (bit 4 at address 036D16, 02ED16, 033D16,
032D16, 02FD16) = “0”: Interrupts requested when data transfer from UARTi trans-
fer buffer register to UARTi transmit register is completed
_ Transmit interrupt cause select bit (bit 4 at address 036D16, 02ED16, 033D16,
032D16, 02FD16) = “1”: Interrupts requested when data transmission from UARTi
transfer register is completed
When receiving
_ Interrupts requested when data transfer from UARTi receive register to UARTi
receive buffer register is completed
Interrupt request
generation timing
Note 1: “m” denotes the value 0016 to FF16 that is set to the UART bit rate generator.