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Under
development
Preliminary Specifications REV.B3
Specifications in this manual are tentative and subject to change.
Mitsubishi Microcomputers
M32C/83 group
SINGLE-CHIP 16/32-BIT CMOS MICROCOMPUTER
Intelligent I/O
254
Group i function enable register (i=0 to 3)
Symbol
Address
When reset
GiFE (i=0 to 3)
00E616, 012616, 016616, 01A616
0016
b7
b0
RW
Bit name
Bit
symbol
IFE0
IFE1
IFE2
Ch0 function enable bit
IFE3
IFE4
IFE5
IFE7
Function
IFE6
Whether the corresponding port
functions is selected
0 : Disables function on ch i
1 : Enables function on ch i
Ch1 function enable bit
Ch2 function enable bit
Ch3 function enable bit
Ch4 function enable bit
Ch5 function enable bit
Ch6 function enable bit
Ch7 function enable bit
Figure 1. 23. 18. WG-related register (3)
Group i waveform generation control register j (i=2 to 3/ j=0 to 7)
Symbol
Address
When reset
GiPOCRj (i=2/j=0 to 3)
015016, 015116, 015216, 015316
0016
GiPOCRj (i=2/j=4 to 7)
015416, 015516, 015616, 015716
0016
GiPOCRj (i=3/j=0 to 3)
019016, 019116, 019216, 019316
0016
GiPOCRj (i=3/j=4 to 7)
019416, 019516, 019616, 019716
0016
RW
Bit name
Function
Bit
symbol
MOD0
MOD1
MOD2
Operation mode
select bit
Output initial value
select bit
IVL
RLD
INV
0: Outputs "0" as the initial value
1: Outputs "1" as the initial value
Parallel RTP output
trigger select bit
PRT
0: Match of WG register j isn’t trigger
1: Match of WG register j is trigger
Inverted output function
select bit
b1
0
1
0
1
b0
0
1
0
1
0
1
0
1
: Single PWM mode
: S-R PWM mode
: Phase delayed PWM mode
: Must not be set
: Bit modulation PWM mode
: Must not be set
: Assigns communication output
to a port
0: Reloads a new count when CPU
writes the count
1: Reloads a new count when the
base timer i is reset
0: Output is not inverted
1: Output is inverted
RTP
RTP port function
select bit
0: Not use
1: Use
b2
0
1
Reload timing
select bit
(Note 2)
(Note 3)
(Note 1)
Note 1: This setting is valid only on even-numbered channels. When this mode is selected, settings for
corresponding odd-numbered (even number + 1) channels are ignored. Waveforms are output for
even-numbered channels, not output for odd-numbered channels.
Note 2: This setting is valid only for group 2 WG function ch0 and 1. Do not set this value for other channels.
Note 3: Inverted output function is allocated at the final stage of WG circuit. Therefore, when selecting "0"
output by IVL bit and inverted output by INV bit, "1" is output.
b7
b0