Under
development
Preliminary Specifications REV.B3
Specifications in this manual are tentative and subject to change.
Mitsubishi Microcomputers
M32C/83 group
SINGLE-CHIP 16/32-BIT CMOS MICROCOMPUTER
Reset
28
(00B716)
(00B816)
(00B916)
(00BA16)
(00BB16)
(00C016)
(00C116)
(00C216)
(00C316)
(00C416)
(00C516)
(00C616)
(00C716)
(00C816)
(00C916)
(00CA16)
(00CB16)
(00CC16)
(00CD16)
(00CE16)
(00CF16)
(00D016)
(00D116)
(00D416)
(00D516)
(00D816)
(00D916)
(00DA16)
(00DB16)
(00DC16)
(00DD16)
(00DE16)
(00DF16)
(009216)
(009316)
(009416)
(009516)
(009616)
(009716)
(009816)
(009916)
(009A16)
(009B16)
(009C16)
(009D16)
(009E16)
(009F16)
(00A016)
(00A116)
(00A216)
(00A316)
(00A416)
(00A516)
(00A616)
(00A716)
(00A816)
(00A916)
(00AA16)
(00AB16)
(00B016)
(00B116)
(00B216)
(00B316)
(00B416)
(00B516)
(00B616)
UART1 transmit/NACK interrupt control register
Key input interrupt control register
Timer B0 interrupt control register
Intelligent I/O interrupt control register 1
Timer B2 interrupt control register
Intelligent I/O interrupt control register 3
Timer B4 interrupt control register
Intelligent I/O interrupt control register 5
INT4 interrupt control register
Intelligent I/O interrupt control register 7
INT2 interrupt control register
INT0 interrupt control register
Exit priority register
Interrupt request register 0
Interrupt request register 1
Interrupt request register 2
Interrupt request register 3
Interrupt request register 4
Interrupt request register 5
Interrupt request register 6
Interrupt request register 7
Interrupt request register 8
Interrupt request register 9
Interrupt request register 10
Interrupt request register 11
Interrupt enable register 0
Interrupt enable register 1
Interrupt enable register 2
Interrupt enable register 3
Interrupt enable register 4
Interrupt enable register 5
Interrupt enable register 6
(59)
(60)
(61)
(62)
(63)
(64)
(65)
(66)
(67)
(68)
(69)
(70)
(71)
(72)
(73)
(74)
(75)
(76)
(77)
(78)
(79)
(80)
(81)
(82)
(83)
(84)
(85)
(86)
(87)
(88)
(89)
(90)
(91)
(92)
(93)
(94)
(95)
(96)
(97)
(98)
(99)
(100)
(101)
(102)
(103)
(104)
(105)
(106)
(107)
(108)
(109)
(110)
(111)
(112)
(113)
(114)
(115)
(116)
Interrupt enable register 7
Interrupt enable register 8
Interrupt enable register 9
Interrupt enable register 10
Interrupt enable register 11
Group 0 time measurement/waveform
generate register 0
Group 0 time measurement/waveform
generate register 1
Group 0 time measurement/waveform
generate register 2
Group 0 time measurement/waveform
generate register 3
Group 0 time measurement/waveform
generate register 4
Group 0 time measurement/waveform
generate register 5
Group 0 time measurement/waveform
generate register 6
Group 0 time measurement/waveform
generate register 7
Group 0 waveform generate control register 0
Group 0 waveform generate control register 1
Group 0 waveform generate control register 4
Group 0 waveform generate control register 5
Group 0 time measurement control register 0
Group 0 time measurement control register 1
Group 0 time measurement control register 2
Group 0 time measurement control register 3
Group 0 time measurement control register 4
Group 0 time measurement control register 5
Group 0 time measurement control register 6
Group 0 time measurement control register 7
XXXX ?000
X X 0 0 ?000
XXXX ?000
X X 0 0 ?000
X X 0X00 0 0
0X0 0X0 0 0
0XX0 00 0 0
00X0 00 0 0
0XXX00 0 0
0XX0 00 0 0
0X0 0X0 0 0
0016
??16
0016
x : Nothing is mapped to this bit
? : Undefined
The content of other registers and RAM is undefined when the microcomputer is reset. The initial values must therefore be set.
XX00X0 0 X
XX00 0 0 0 X
00X 0 0 0 0 X
XXX0 0 0 0 X
00X 0 0 0 0 X
XX00X0 0 X
X X 00X0X X
XXX0 0 0 0 X
0XX0 0 0 0 X
XX00 X 0 0 0
X X 0 0X0X0
XX0 0 0 000
00X0 0 000
XXX0 0 000
Intelligent I/O interrupt control register 9/
CAN interrupt 0 control register
Figure 1.4.3. Device's internal status after a reset is cleared (2/10)