Under
development
Preliminary Specifications REV.B3
Specifications in this manual are tentative and subject to change.
Mitsubishi Microcomputers
M32C/83 group
SINGLE-CHIP 16/32-BIT CMOS MICROCOMPUTER
Usage precaution
342
(4) When D-A converter is not used, set output disabled with the D-A output enable bit of D-A control
register and set the D-A register to "0016".
(5) When D-A conversion is used, select the input peripheral function disabled with port P93 and P94 input
peripheral function select bit of the function select register B3.
When the input peripheral function disabled is selected, the port cannot be input even if the port
direction register is set to input (the input result becomes undefined).
Also, it is not possible to input a peripheral function.
DRAM controller
The DRAM self-refresh operates in stop mode, etc.
When shifting to self-refresh, select DRAM is ignored by the DRAM space select bit. In the next instruc-
tion, simultaneously set the DRAM space select bit and self-refresh ON by self-refresh mode bit. Also,
insert two NOPs after the instruction that sets the self-refresh mode bit to "1".
Do not access external memory while operating in self-refresh. (All external memory space access is
inhibited. )
When disabling self-refresh, simultaneously select DRAM is ignored by the DRAM space select bit and
self-refresh OFF by self-refresh mode bit. In the next instruction, set the DRAM space select bit.
Do not access the DRAM space immediately after setting the DRAM space select bit.
Example) One wait is selected by the wait select bit and 4MB is selected by the DRAM space select bit
Shifting to self-refresh
mov.b
#00000001b,DRAMCONT
;DRAM is ignored, one wait is selected
mov.b
#10001011b,DRAMCONT
;Set self-refresh, select 4MB and one wait
nop
;Two nops are needed
nop
;
Disable self-refresh
mov.b
#00000001b,DRAMCONT
;Disable self-refresh, DRAM ignored, one wait is
;selected
mov.b
#00001011b,DRAMCONT
;Select 4MB and one wait
nop
;Inhibit instruction to access DRAM area
nop
Setting the registers
The registers shown in Table 1.31.3 include indeterminate bit when read. Set immidiate to these regis-
ters.
Store the content of the frequently used register to RAM, change the content of RAM, then transfer to the
register.