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參數(shù)資料
| 型號(hào)： | ISP1761ET |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線控制器 |
| 英文描述： | Hi-Speed Universal Serial Bus On-The-Go controller |
| 中文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PBGA128 |
| 封裝： | 9 X 9 MM, 0.80 MM HEIGHT, PLASTIC, MO-195, SOT857-1, TFBGA-128 |
| 文件頁數(shù)： | 98/158頁 |
| 文件大小： | 724K |
| 代理商： | ISP1761ET |
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9397 750 13258
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 01 — 12 January 2005
98 of 158
Philips Semiconductors
ISP1761
Hi-Speed USB OTG controller
10. Peripheral Controller
10.1 Introduction
The design of the Peripheral Controller in the ISP1761 is compatible with the Philips
ISP1582 Hi-Speed Universal Serial Bus peripheral controllerIC. The functionality of the
Peripheral Controller in the ISP1761 is similar to the ISP1582 in the 16-bit bus mode. In
addition, the register sets are also similar, with only a few variations.
The USB Chapter 9 protocol handling and data transfer operations of the Peripheral
Controller are executed using external firmware. The external microcontroller or
microprocessor can access the Peripheral Controller-specific registers through the local
bus interface. The transfer of data between a microprocessor and the Peripheral
Controller can be done in the PIO mode or the programmed DMA mode.
For details on general functional description of the Peripheral Controller, refer to the
ISP1582 data sheet. For details on the software programming, refer to ISP1581
Programming Guide (AN10004)and ISP1582/83 Control Pipe (AN10031)
10.1.1
Direct Memory Access (DMA)
The DMA controller of the ISP1761 is used to transfer data between the system memory
and endpoints buffers. It is a slave DMA controller that requires an external DMA master
to control the transfer.
10.1.1.1
DMA for the IN endpoint
When the internal DMA is enabled and at least one buffer is free, the DC_DREQ line is
asserted. The external DMA controller then starts negotiating for control of the bus. As
soon as it has access, it asserts the DC_DACK line and starts writing data. The burst
length is programmable. When the number of bytes equal to the burst length has been
written, the DC_DREQ line is deasserted. As a result, the DMA controller deasserts the
DC_DACK line and releases the bus. At that moment, the whole cycle restarts for the next
burst. When the buffer is full, the DC_DREQ line is deasserted and the buffer is validated
(which means that it is sent to the host at the next IN token). When the DMA transfer is
terminated, the buffer is also validated (even if it is not full).
10.1.1.2
DMA for the OUT endpoint
When the internal DMA is enabled and at least one buffer is full, the DC_DREQ line is
asserted. The external DMA controller then starts negotiating for control of the bus. As
soon as it has access, it asserts the DC_DACK line and starts reading data. The burst
length is programmable. When the number of bytes equal to the burst length has been
read, the DC_DREQ line is deasserted. As a result, the DMA controller deasserts the
DC_DACK line and releases the bus. At that moment, the whole cycle restarts for the next
burst. When all the data is read, the DC_DREQ line is deasserted and the buffer is
cleared (this means that it can be overwritten when a new packet arrives).
10.1.1.3
DMA initialization
To reduce the power consumption, a controllable clock that drives the DMA controller
circuits is turned off, by default. If the DMA functionality is required by an application,
DMACLKON (bit 9) of the Mode register (address: 020Ch) must be enabled during
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ISP1761ET,518 | 功能描述:USB 接口集成電路 USB 2.0 HS OTG HOST RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1761ET,551 | 功能描述:USB 接口集成電路 DO NOT USE ORDER -T OR NO "-" RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1761ET,557 | 功能描述:USB 接口集成電路 USB 2.0 HS OTG HOST RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1761ETGE | 功能描述:IC USB CTRL HI-SPEED 128TFBGA RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A |
| ISP1761ET-S | 功能描述:IC USB OTG CONTROLLER 128TFBGA RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A |
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