參數(shù)資料
型號(hào)： ISP1761ET
廠商： NXP SEMICONDUCTORS
元件分類： 總線控制器
英文描述： Hi-Speed Universal Serial Bus On-The-Go controller
中文描述： UNIVERSAL SERIAL BUS CONTROLLER, PBGA128
封裝： 9 X 9 MM, 0.80 MM HEIGHT, PLASTIC, MO-195, SOT857-1, TFBGA-128
文件頁數(shù)： 44/158頁
文件大?。?/td> 724K
代理商： ISP1761ET
9397 750 13258
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 01 — 12 January 2005
44 of 158
Philips Semiconductors
ISP1761
Hi-Speed USB OTG controller
8.3.2
HcChipID register (R: 0304h)
Read this register to get the ID of the ISP1761. This upper word of the register contains
the hardware version number and the lower word contains the chip ID.
Table 36
shows the
bit description of the register.
8.3.3
HcScratch register (R/W: 0308h)
This register is for testing and debugging purposes only. The value read back must be the
same as the value that was written. The bit description of this register is given in
Table 37
.
8.3.4
SW Reset register (R/W: 030Ch)
Table 38
shows the bit allocation of the register.
7
6
-
DACK_POL
reserved; write logic 0
DACK Polarity
:
1 —
indicates that the DACK input is active HIGH
0 —
indicates active LOW.
DREQ Polarity
:
1 —
indicates that the DREQ output is active HIGH
0 —
indicates active LOW.
reserved; write logic 0
Interrupt Polarity
:
0 —
active LOW
1 —
active HIGH.
Interrupt Level
:
0 —
INT level triggered
1 —
INT is edge triggered. A pulse of certain width is generated.
Global Interrupt Enable
: This bit must be set to logic 1 to enable IRQ
signal assertion.
0 —
IRQ assertion disabled. IRQ will never be asserted, regardless of
other settings or IRQ events
1 —
IRQ assertion enabled. IRQ will be asserted according to the
HcInterruptEnable register, and events setting and occurrence
5
DREQ_POL
4 to 3
2
-
INTR_POL
1
INTR_LEVEL
0
GLOBAL_INTR
_EN
Table 35:
Bit
HW Mode Control register: bit description
…continued
Symbol
Description
Table 36:
Bit
31 to 0
HcChipID register: bit description
Symbol
Access
CHIPID
[31:0]
Value
0001 1761h
Description
Chip ID
: This register represents the hardware
version number (0001h) and the chip ID (1761h)
for the Host Controller.
R
Table 37:
Bit
31 to 0
HcScratch register: bit description
Symbol
Access
SCRATCH[31:0] R/W
Value
0000 0000h
Description
Scratch
: For testing and debugging
purposes
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ISP1761ET,518 功能描述:USB 接口集成電路 USB 2.0 HS OTG HOST RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1761ET,551 功能描述:USB 接口集成電路 DO NOT USE ORDER -T OR NO "-" RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1761ET,557 功能描述:USB 接口集成電路 USB 2.0 HS OTG HOST RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1761ETGE 功能描述:IC USB CTRL HI-SPEED 128TFBGA RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A
ISP1761ET-S 功能描述:IC USB OTG CONTROLLER 128TFBGA RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A
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