參數(shù)資料
型號： ISP1761ET
廠商： NXP SEMICONDUCTORS
元件分類： 總線控制器
英文描述： Hi-Speed Universal Serial Bus On-The-Go controller
中文描述： UNIVERSAL SERIAL BUS CONTROLLER, PBGA128
封裝： 9 X 9 MM, 0.80 MM HEIGHT, PLASTIC, MO-195, SOT857-1, TFBGA-128
文件頁數(shù)： 73/158頁
文件大?。?/td> 724K
代理商： ISP1761ET
9397 750 13258
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 01 — 12 January 2005
73 of 158
Philips Semiconductors
ISP1761
Hi-Speed USB OTG controller
Table 70:
Bit
DW7
63 to 32
DW6
31 to 0
DW5
63 to 32
DW4
31 to 6
5
Start and complete split for bulk, QHASS/CS: bit description
Symbol
Access
Description
reserved
-
-
reserved
-
-
reserved
-
-
reserved
J
-
SW —
writes
-
0 —
To increment the PTD pointer
1 —
To enable the next PTD branching.
Next PTD Pointer
: Next PTD branching assigned by the PTD pointer.
4 to 0
NextPTDPointer
[1:0]
SW —
writes
DW3
63
A
SW —
sets
HW —
resets
HW —
writes
HW —
writes
Active
: Write the same value as that in V.
62
61
H
B
Halt
: This bit correspond to the Halt bit of the Status field of QH.
Babble
: This bit correspond to the Babble Detected bit in the Status field
of the iTD, SiTD or QH.
1 —
when babbling is detected, A and V are set to 0.
Transaction Error
: This bit corresponds to the Transaction Error bit in
the status field.
Start/Complete
:
0 —
Start split
1 —
Complete split.
-
Data Toggle
: Set the Data Toggle bit to start for the PTD.
60
X
59
SC
SW —
writes 0
HW —
updates
58
57
reserved
DT
-
HW —
writes
SW —
writes
HW —
updates
SW —
writes
56 to 55
Cerr[1:0]
Error Counter
: This field contains the error count for start and complete
split (QHASS). When an error has no response or bad response,
Cerr[1:0] will be decremented to zero and then Valid will be set to zero. A
NAK or NYET will reset Cerr[1:0]. For details, refer to Enhanced Host
Controller Interface Specification for Universal Serial Bus Rev. 1.0
Section 4.12.1.2.
If retry has insufficient time at the beginning of a new SOF, the first PTD
must be this retry. This can be accomplished by if aperiodic PTD is not
advanced.
NAK Counter
: The V bit is reset if NakCnt decrements to zero and RL is
a non-zero value. Not applicable to isochronous split transactions.
54 to 51
NakCnt[3:0]
HW —
writes
SW —
writes
-
HW —
writes
50 to 47
46 to 32
reserved
NrBytesTransferred
[14:0]
-
Number of Bytes Transferred
: This field indicates the number of bytes
sent or received for this transaction.
DW2
31 to 29
reserved
-
-
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相關代理商/技術參數(shù)
參數(shù)描述
ISP1761ET,518 功能描述:USB 接口集成電路 USB 2.0 HS OTG HOST RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1761ET,551 功能描述:USB 接口集成電路 DO NOT USE ORDER -T OR NO "-" RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1761ET,557 功能描述:USB 接口集成電路 USB 2.0 HS OTG HOST RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1761ETGE 功能描述:IC USB CTRL HI-SPEED 128TFBGA RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標準包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應商設備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A
ISP1761ET-S 功能描述:IC USB OTG CONTROLLER 128TFBGA RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標準包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應商設備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A
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