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Intel387
TM
SX MATH COPROCESSOR
16-BIT REAL-ADDRESS MODE AND VIRTUAL 8086 MODE FORMAT
15
7
0
CONTROL WORD
0
STATUS WORD
2
TAG WORD
4
INSTRUCTION POINTER 15..0
6
IP19.16
0
OPCODE 10..0
8
OPERAND POINTER 15..0
A
DP 19.16
0
0
0
0
0
0
0
0
0
0
0
0
C
Figure 3-8. Instruction and Data Pointer Image in Memory, 16-Bit Real-Mode Format
3.3 Data Types
Table 3-6 lists the seven data types that the Math
CoProcessor supports and presents the format for
each type. Operands are stored in memory with the
least significant digit at the lowest memory address.
Programs retrieve these values by generating the
lowest address. For maximum system performance,
all operands should start at physical-memory ad-
dresses that correspond to the word size of the
CPU; operands may begin at any other addresses,
but will require extra memory cycles to access the
entire operand.
The data type formats can be divided into three
classes: binary integer, decimal integer, and binary
real. These formats, however, exist in memory only.
Internally, the Math CoProcessor holds all numbers
in the extended-precision real format. Instructions
that load operands from memory automatically con-
vert operands represented in memory as 16, 32, or
64-bit integers, 32 or 64-bit floating point numbers,
or 18 digit packed BCD numbers into extended-pre-
cision real format. Instructions that store operands in
memory perform the inverse type conversion.
In addition to the typical real and integer data values,
the Intel387 SX Math CoProcessor data formats en-
compass encodings for a variety of special values.
These special values have significance and can ex-
press relevant information about the computations
or operations that produced them. The various types
of special values are denormal real numbers, zeros,
positive and negative infinity, NaNs (Not-a-Number),
Indefinite, and unsupported formats. For further in-
formation on data types and formats, see the In-
tel387 Programmer’s Reference Manual.
3.4 Interrupt Description
CPU interrupts are used to report errors or excep-
tional conditions while executing numeric programs
in either real or protected mode. Table 3-7 shows
these interrupts and their functions.
3.5 Exception Handling
The Math CoProcessor detects six different excep-
tion conditions that occur during instruction execu-
tion. Table 3-8 lists the exception conditions in order
of precedence, showing for each the cause and the
default action taken by the Math CoProcessor if the
exception is masked by its corresponding mask bit in
the control word.
Any exception that is not masked by the control
word sets the corresponding exception flag of the
status word, sets the ES bit of the status word, and
asserts the ERROR
Y
signal. When the CPU at-
tempts to execute another ESC instruction or WAIT,
exception 16 occurs. The exception condition must
be resolved via an interrupt service routine. The re-
turn address pushed onto the CPU stack upon entry
to the service routine does not necessarily point to
the failing instruction nor to the following instruction.
The CPU saves the address of the floating-point in-
struction that caused the exception and the address
of any memory operand required by that instruction.
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