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| 型號： | IBM25PPC970FX6UB267ET |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 64-BIT, 1800 MHz, RISC PROCESSOR, CBGA576 |
| 封裝： | 25 X 25 MM, 1 MM PITCH, CERAMIC, BGA-576 |
| 文件頁數(shù)： | 70/78頁 |
| 文件大?。?/td> | 3524K |
| 代理商： | IBM25PPC970FX6UB267ET |
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Datasheet
PowerPC 970FX RISC Microprocessor
System Design Information
Page 72 of 78
Version 2.5
March 26, 2007
C2_UND_GLOBAL
1
In
Debug: adjusts the C2 clock to internal latches and is not used for
normal operation.
CHKSTOP
1
OD
/BiDi
System: checkstop input and output.
CKTERM_DIS
1
In
Disable internal termination in clock receiver.
—
CLKIN
2
In
System: PI clock in; differential clock to the processor.
—
CLKOUT
2
Out
System: PI differential clock to the bus.
—
DI2
1
In
Dedicated manufacturing signal.
EI_DISABLE
1
In
Debug: Disables the use of the initial alignment procedure (IAP) to
adjust clock skew on the processor interface.
—
GPULDBG
1
In
Debug: POR debug mode select.
—
HRESET
1
In
System: POR.
—
I2CCK
1
OD
/BiDi
System: I2C signal clock.
I2CDT
1
OD
/BiDi
System: I2C interface data.
I2CGO
1
OD
Debug: handshake signal to arbitrate JTAG or I2C access.
INT
1
In
System: external interrupt when low.
—
LSSD_SCAN_ENABLE
1
In
For manufacturing test use only.
KVPRBVDD
1
In
VDD test point.
KVPRBGND
1
In
GND test point.
LSSD_STOP_ENABLE
1
In
For manufacturing test use only.
LSSD_STOPC2_ENABLE
1
In
For manufacturing test use only.
LSSD_STOPC2STAR_ENABLE
1
In
For manufacturing test use only.
LSSDMODE
1
In
For manufacturing test use only.
MCP)
1
In
System: machine check interrupt.
—
PLL_LOCK
1
Out
Indicates that the PLL has locked.
—
Table 5-8. Input/Output Signal Descriptions (Page 2 of 4)
Pin Name
Width
In/Out
System/Debug Function
Notes
Notes:
1. These are test signals for factory use only and must be pulled up to OVDD for normal processor operation.
2. For I2C or JTAG operation, the TCK and TDI signals must be pulled down to ground with a 10 k
Ω resistor. See Section 3.10.3 on
page 43.
3. Bus ratios 8:1 and 16:1 are not supported for PI Input functionality.
4. These are test signals for factory use only and must be pulled down to GND for normal processor operation.
5. This signal should not be connected.
6. These pins can be used to measure on-chip voltage drop and noise. They should be connected to a backside probe point
immediately behind the module. They should not be connected to GND and VDD planes.
7. BiDi = bidirectional. OD = open drain.
8. Using the 4:1 or 12:1 ratio with multiplier of 12 limits the use of power tuning to (frequency)/2.
9. The PLL_MULT and PLL_RANGE(1:0) bits can be overwritten by JTAG commands and the BUS_CFG bits can be changed by
SCOM commands during the POR sequence. See the PowerPC 970FX Power On Reset Application Note for more details
10. Must be pulled down with a 10 k
Ω resistor to GND.
11. The TRST signal must be pulled up to OVDD with a 10 kΩ resistor.
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相關(guān)代理商/技術(shù)參數(shù) |
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| IBM25PPC970FX6UB429RT | 制造商:IBM Microelectronics 功能描述:MPU 970FX RISC 64BIT 90NM 1.5V 576CBGA - Trays 制造商:IBM 功能描述:IBM IBM25PPC970FX6UB429RT Co-Processors |
| IBM25PPC970GX7TR01-ET | 制造商:IBM 功能描述:ANTARES GX DD1.0X 1.2GHZ POWER OPTIMIZED - Trays |
| IBM25PPC970GX7TR05-ET | 制造商:IBM 功能描述:ANTARES GX DD1.0X 1.4GHZ POWER OPTIMIZED - Trays |
| IBM25PPC970GX7TR20-ET | 制造商:IBM Microelectronics 功能描述:ANTARES GX DD1.0X 1.6GHZ POWER OPTIMIZED - Trays |
| IBM25PPC970GX7TR23-ET | 制造商:IBM 功能描述:ANTARES GX DD1.0X 1.6GHZ PERFORMANCE OPTIMIZED - Trays |
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