參數(shù)資料
型號: IBM25PPC970FX6UB267ET
元件分類: 微控制器/微處理器
英文描述: 64-BIT, 1800 MHz, RISC PROCESSOR, CBGA576
封裝: 25 X 25 MM, 1 MM PITCH, CERAMIC, BGA-576
文件頁數(shù): 64/78頁
文件大?。?/td> 3524K
代理商: IBM25PPC970FX6UB267ET
Datasheet
PowerPC 970FX RISC Microprocessor
Version 2.5
March 26, 2007
System Design Information
Page 67 of 78
5.4 Decoupling Recommendations
Capacitor decoupling is required for the PowerPC 970FX. Decoupling capacitors act to reduce high-
frequency chip switching noise and to provide localized bulk charge storage to reduce major power surge
effects. Recommendations for high-frequency noise decoupling are provided. Bulk decoupling requires a
more complete understanding of the system and system power architecture, and is beyond the scope of this
document.
High-frequency decoupling capacitors should be located as close as possible to the processor with low lead
inductance to the ground and voltage planes. The recommended placement of the decoupling capacitors is
shown in Figure 5-2 on page 68. The decoupling layout is divided into three groups:
Group 1 is located in the center of the package and under the PowerPC 970FX die.
Group 2 includes Group 1 and is located in the center of the package and under the PowerPC 970FX die.
Group 3, located adjacent to Group 2 (which includes Group 1), lies under the module footprint. Printed
circuit board vias for the decoupling capacitors should ideally be through-type vias with via-in-pad for low
impedance.
The recommended decoupling capacitor specifications are provided in Table 5-4.
The minimum recommended number of decoupling capacitors for Group 1 and Group 2 is provided
5.4.1 Using the KVPRBVDD and KVPRBGND Pins
The PowerPC 970FX features one pair of VDD and GND pins to assist in analyzing on-chip noise and voltage
drop. These pins should not be connected into the normal VDD and GND planes, but should be brought out to
test pads by traces that are as short as possible. An oscilloscope can be used on these test pads to measure
on-chip VDD noise and thus to verify the decoupling and voltage regulation in a design. If these pins are not
needed, they should be left unconnected.
Table 5-4. Recommended Decoupling Capacitor Specifications
Specification
Value
Size
0402 (1.00
× 0.50 mm)
Capacitance
100 nF
Dielectric type
Y5V or X7R
Voltage rating
10 V
Table 5-5. Recommended Minimum Number of Decoupling Capacitors (See Figure 5-2 on page 68)
Group 1
Includes all balls in the area defined by a red
rectangle from H9 to U16.
Group 2
Includes all balls in the area defined by a
dotted-green rectangle from F7 to W18.
Also includes all balls in Group 1.
Group 3
Includes all balls on the chip not in
Groups 1 and 2.
Minimum of 40:
33 VDD -GND
7 OVDD -GND
Minimum of 80 capacitors
(including all 12 OVDD capacitors)
Minimum of 35 VDD -GND
Minimum of 4 OVDD -GND
Note: Add additional decoupling capacitors to improve noise performance.
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