參數(shù)資料
型號(hào): IBM25PPC970FX6UB267ET
元件分類: 微控制器/微處理器
英文描述: 64-BIT, 1800 MHz, RISC PROCESSOR, CBGA576
封裝: 25 X 25 MM, 1 MM PITCH, CERAMIC, BGA-576
文件頁(yè)數(shù): 66/78頁(yè)
文件大?。?/td> 3524K
代理商: IBM25PPC970FX6UB267ET
Datasheet
PowerPC 970FX RISC Microprocessor
Version 2.5
March 26, 2007
System Design Information
Page 69 of 78
5.6 Pullup and Pulldown Recommendations
For reliable operation, it is highly recommended that the unused inputs be connected to an appropriate
signal level. For example:
Unused active-low inputs should be tied to VDD.
Multiple unused active-high inputs can be ganged together for convenience.
Unused active-high inputs should be connected to GND.
Multiple unused active-low inputs can be ganged together for convenience.
All no-connect signals must remain unconnected.
Power and ground connections must be made to all external VDD and GND pins of the PowerPC 970FX.
Table 5-6 provides details about the pin settings and information of the PowerPC 970FX debug and bringup
signals. Table 5-7 on page 70 provides details about the appropriate connections for the PowerPC 970FX
manufacturing test-only signals.
Table 5-6. PowerPC 970FX Debug and Bringup Pin Settings and Information
Pin Name
Pin Location
In/Out/BiDi/JTAG1
Pull-Up or Pull-
Down Resistor
Setting2
(For Normal
Operation)
Comments
AVP_RESET
W23
In
Up
C1_UND_GLOBAL
AC16
In
Down
C2_UND_GLOBAL
AC15
In
Down
GPULDBG
AA22
In
Up
I2CGO
N22
Out
Up
Arbitrates between I2C and
JTAG.
TBEN
AD17
In
Down
TCK
AD21
In-JTAG
Down
JTAG – test clock
TDI
AB21
In-JTAG
Down
JTAG – test data in
TDO
AD13
Out-JTAG
Down
JTAG – test data out
TMS
AD22
In-JTAG
Down
JTAG – test mode select
TRIGGERIN
N21
In
Down
TRIGGEROUT
N19
Out
.
TRST
W20
In-JTAG
Up
Not needed – HRESET per-
forms the Common On-Chip
Processor (COP) reset func-
tion. Pulled up to OVDD by a
10 k
Ω resistor.
Notes:
1. BiDi = Bidirectional.
2. Pullups should use a 10 k
Ω resistor to OVDD. Pulldowns should use a 10 kΩ resistor to GND.
3. For I2C or JTAG operation, see Section 3.10.3 on page 43.
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