Slow AMBA Peripherals
13-70
GMS30C7201 Data Sheet
13.11.3AIC Unit hardware interface and signal description
Name
Type
Source/
Destination
Description
PCLK
In
UART Clock
UART clock.
BnRES
In
APB Bridge
Reset signal generated from the APB Bridge.
ACLK
Out
AIC unit/ADC
ADC operation clock output (PCLK or test clk).
PA[7:2]
In
APB Bridge
This is the peripheral address bus, which is used by an
individual peripheral for decoding register accesses to that
peripheral.
The addresses become valid before
PSTB
goes HIGH, and
remain valid after
PSTB
goes LOW.
PD[31:0]
InOut
APB Peripherals,
BD Bus
This is the bi-directional peripheral data bus. The data bus is
driven by this block during read cycles (when
PWRITE
is
LOW).
PSTB
In
APB Bridge
This strobe signal is used to time all accesses on the
peripheral bus. The falling edge of
PSTB
is coincident with
the falling edge of
BCLK
.
PWRITE
In
APB Bridge
When HIGH, this signal indicates a write to a peripheral.
When LOW, it indicates a read from a peripheral.
This signal has the same timing as the peripheral address
bus. It becomes valid before
PSTB
goes HIGH and remains
valid after
PSTB
goes LOW.
PSEL
In
APB Bridge
When HIGH, this signal indicates that this module has been
selected by the APB bridge. This selection is a decode of the
system address bus (ASB). For more details, see
AMBA
Peripheral Bus Controller
(ARM DDI0044).
INTAIC
Out
Interrupt
Controller
Interrupt request when either touch panel buffer is full, or
sound buffer is full, or battery data is checked.
AA[3:0]
Out
AD Converter
This is the address bus used to select a register in the ADC
unit.
AD[7:0]
InOut
AD Converter,
AIC
This is a the bi-directional data bus which is connected to the
ADC.
AASN
Out
AD Converter
Address strobe signal for accessing ADC registers. When
there is a signal transition to a LOW state, address is valid.
AWRn
Out
AD Converter
Write strobe signal to write control or status register of ADC.
This is an active LOW signal.
ARDn
Out
AD Converter
Read strobe signal to read the contents of ADC registers. This
is an active LOW signal.
AIOSTOP
Out
AD Converter
This signal is used to stop input/output operation of the ADC.
When this signal becomes HIGH (1), all ADC operations will
stop, to save power to the ADC drive.
Table 13-54: AIC signal descriptions