Introduction
1-2
GMS30C7201 Data Sheet
1.1
Introduction
The GMS30C7201 is a high-performance, low-power, single-chip computer optimized
for WinCE applications. It incorporates the ARM720T WinCE-enabled core, which also
incorporates ARM
’
s novel Thumb code compression mechanism. The GMS30C7201
also incorporates ARM
’
s unique Piccolo DSP coprocessor, which gives the
GMS30C7201 enough DSP horse-power to perform software modem functions
simultaneously with WinCE operation.
1.1.1 Processor
The ARM720T core incorporates an 8K unified write-through cache, and an 8 data
entry, 4 address entry write buffer. It also incorporates an MMU with a 64 entry TLB,
and WinCE enhancements. The Piccolo SP7 core incorporates a 512-byte, instruction-
only cache. Piccolo data is supplied by the ARM720T core, via the coprocessor
interface, and hence may be cached in the ARM720T
’
s 8K unified cache.
1.1.2 Piccolo
Piccolo is an ARM coprocessor that boosts the performance of the standard ARM720T
CPU to state-of-the-art DSP levels. It integrates:
DSP-oriented datapath
associated DSP instruction set
in addition to the standard ARM 32-bit RISC/16-bit Thumb system.
The design/implementation of the Piccolo coprocessor allows data re-use - both the
ARM720T and the coprocessor share the same single system bus. The implementation
is therefore cost-effective and power-efficient. Other advantages of this approach
include integrated hardware and software development. The ARM software
development toolkit and emulator support both the CPU and the coprocessor. The
GMS30C7201 will run a V34bis (33k6bps) softmodem.
1.1.3 Video
The GMS30C7201 has direct support for mono and color passive LCD displays, as well
as color TFT LCD displays, with resolution programmable up to 640x480 VGA
resolution. In addition, a separate independent VGA port allows simultaneous display
on a VGA resolution monitor, of either the same image as the LCD, or alternatively an
entirely different image. The GMS30C7201 has on-chip video DACs, allowing the chip
to drive a monitor with the minimum of external circuitry.
1.1.4 Memory and PC-Cards
GMS30C7201 incorporates two separate memory interfaces. A high speed 16-bit wide
interface connects directly to one to four 16, 64 or 128MBit SDRAM devices, supporting
DRAM memory sizes in the range 2 to 64MB. In addition, a separate lower speed 32-
bit data path interfaces to ROM or Flash devices. Burst mode ROMs are supported, for
increased performance, allowing operating system code to be executed directly from
ROM. Since the ROM and SDRAM interfaces are separate, the ARM processor core
can access O/S code in ROM simultaneously with video DMA access to the SDRAM,
thus increasing total effective memory bandwidth, and hence overall performance. In
addition, running code directly from ROM reduces total system cost, since ROM is
significantly cheaper on a $/bit basis than DRAM.
The ROM/Flash interface also allows control of one or two PC-Card interfaces,
although in this case, external buffers and level translators are needed to interface to
the card. The GMS30C7201 generates all signals to control these buffers directly.
Since CompactFlash is a subset of the PC-Card standard, one of the PC-Card slots