參數(shù)資料
型號： GCIXP1250-200
英文描述： Microprocessor
中文描述： 微處理器
文件頁數(shù)： 73/148頁
文件大?。?/td> 1601K
代理商： GCIXP1250-200
Intel
IXP1250 Network Processor
Datasheet
73
4.3
AC Specifications
4.3.1
Clock Timing Specifications
The ac specifications consist of input requirements and output responses. The input requirements
consist of setup and hold times, pulse widths, and high and low times. Output responses are delays
from clock to signal. The ac specifications are defined separately for each clock domain within the
IXP1250.
For example,
Figure 14
shows the ac parameter measurements for the PCI_CLK signal, and
Table
39
and
Table 40
specify parameter values for clock signal ac timing. See also
Figure 15
for a
further illustration of signal timing. Unless otherwise noted, all ac parameters are guaranteed when
tested within the functional operating range of
Table 32
.
Unless otherwise indicated, all ac output delays are measured with a 5 pF load. Capacitive
deratings are provided for all output buffers.
4.3.2
PXTAL Clock Input
Figure 13. PXTAL Clock Input
Table 38. PXTAL Clock Inputs
Symbol
Parameter
Minimum
Typical
Maximum
Unit
F
pxtal
Clock frequency
3.5795
3.6864
3.7878
MHz
V
ptp
Clock peak to peak
0.6*VDDX
---
V
V
high
Clock high threshold
2.0
---
V
V
low
Clock low threshold
---
0.8
V
Clock slew rate
1
1. Not tested. Guaranteed by design.
2. Core frequency (F
core
) of 165.89 MHz when register PLL_CFG[4:0] = 10000b.
3. Core frequency (F
) of 166.67 MHz when register PLL_CFG[4:0] = 01111b and F
= 3.7878 MHz. Refer to the
IXP1200
Network Processor Family Micrcode Programmer’s Reference Manual
for a complete list of programmable frequencies.
4. Core frequency (F
) of 199.0656 MHz when register PLL_CFG[4:0] = 10011b and F
= 3.6864 MHz. Refer to the
IXP1200
Network Processor Family Micrcode Programmer’s Reference Manual
for a complete list of programmable frequencies..
1
4
V/ns
F
core
Core frequency
2,3,4
165.89
MHz
A8553-01
1/F
PXTAL
T
f
T
r
V
l
V
h
V
ptp
T
high
T
low
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