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參數(shù)資料
| 型號： | GCIXP1250-200 |
| 英文描述： | Microprocessor |
| 中文描述： | 微處理器 |
| 文件頁數(shù)： | 5/148頁 |
| 文件大?。?/td> | 1601K |
| 代理商： | GCIXP1250-200 |
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Datasheet
v
Intel
IXP1250 Network Processor
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Pinout Diagram....................................................................................................26
64-Bit Bidirectional IX Bus, 1-2 MAC Mode.........................................................53
64-Bit Bidirectional IX Bus, 1-2 MAC Mode, FastPort Device.............................54
64-Bit Bidirectional IX Bus, 3+ MAC Mode..........................................................56
32-Bit Unidirectional IX Bus, 1-2 MAC Mode ......................................................59
32-bit Unidirectional IX Bus, 3+ MAC Mode (3-4 MACs Supported)...................61
Typical IXP1250 Heatsink Application.................................................................70
PXTAL Clock Input..............................................................................................73
PCI Clock Signal AC Parameter Measurements.................................................74
PCI Bus Signals ..................................................................................................75
RESET_IN_L Timing Diagram ............................................................................77
IEEE 1149.1/Boundary-Scan General Timing.....................................................79
IEEE 1149.1/Boundary-Scan Tri-State Timing....................................................80
FCLK Signal AC Parameter Measurements........................................................81
IX Bus Signals Timing.........................................................................................82
64-Bit Bidirectional IX Bus Timing, 1-2 MAC Mode, Consecutive Receive and
Transmit, No EOP ...............................................................................................84
64-Bit Bidirectional IX Bus Timing - Consecutive Receive and Transmit, No
EOP.....................................................................................................................85
64-Bit Bidirectional IX Bus Timing - Consecutive Receive and Transmit, EOP
on 8th Data Return with Status ...........................................................................86
64-Bit Bidirectional IX Bus Timing - Consecutive Receive and Transmit, EOP
on 7th Data Return with Status ...........................................................................87
64-Bit Bidirectional IX Bus Timing - Consecutive Receive and Transmit, EOP
on 6th Data Return with Status ...........................................................................88
64-Bit Bidirectional IX Bus Timing - Consecutive Receive and Transmit, EOP
on 5th Data Return with Status ...........................................................................89
64-Bit Bidirectional IX Bus Timing - Consecutive Receive and Transmit, EOP
on 4th Data Return with Status ...........................................................................90
64-Bit Bidirectional IX Bus Timing - Consecutive Receive and Transmit, EOP
on 1st through 3rd Data Return with Status (3rd Data Return Shown)...............91
64-Bit Bidirectional IX Bus Timing - Consecutive Receives, EOP on 1st Data
Return, No Status................................................................................................92
64-Bit Bidirectional IX Bus Timing - Consecutive Receives, No EOP.................93
64-Bit Bidirectional IX Bus Timing - Consecutive Receives, EOP on 8th Data
Return with Status...............................................................................................94
64-Bit Bidirectional IX Bus Timing - Consecutive Receives, EOP on 7th Data
Return with Status...............................................................................................95
64-Bit Bidirectional IX Bus Timing - Consecutive Receives, EOP on 6th Data
Return with Status...............................................................................................96
64-Bit Bidirectional IX Bus Timing - Consecutive Receives, EOP, Two
Element Transfer with Status..............................................................................97
64-Bit Bidirectional IX Bus Timing - Consecutive Receives, Fetch-9, No EOP...98
64-Bit Bidirectional IX Bus Timing - Consecutive Transmits, EOP......................99
64-Bit Bidirectional IX Bus Timing - Consecutive Transmits with Prepend,
EOP...................................................................................................................100
32-Bit Unidirectional IX Bus Timing - Consecutive Receives, No EOP.............101
32-Bit Unidirectional IX Bus Timing - Consecutive Receives, EOP on 16th
Data Return with Status ....................................................................................102
32-Bit Unidirectional IX Bus Timing - Consecutive Receives, EOP on 15th
Data Return with Status ....................................................................................103
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| GCIXP1250BA | 功能描述:IC MPU NETWORK 166MHZ 520-BGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:- 標準包裝:40 系列:MPC83xx 處理器類型:32-位 MPC83xx PowerQUICC II Pro 特點:- 速度:267MHz 電壓:0.95 V ~ 1.05 V 安裝類型:表面貼裝 封裝/外殼:516-BBGA 裸露焊盤 供應(yīng)商設(shè)備封裝:516-PBGAPGE（27x27） 包裝:托盤 |
| GCIXP1250BB | 功能描述:IC MPU NETWORK 200MHZ 520-BGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:- 標準包裝:40 系列:MPC83xx 處理器類型:32-位 MPC83xx PowerQUICC II Pro 特點:- 速度:267MHz 電壓:0.95 V ~ 1.05 V 安裝類型:表面貼裝 封裝/外殼:516-BBGA 裸露焊盤 供應(yīng)商設(shè)備封裝:516-PBGAPGE（27x27） 包裝:托盤 |
| GCIXP1250BC | 功能描述:IC MPU NETWORK 232MHZ 520-BGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:- 標準包裝:40 系列:MPC83xx 處理器類型:32-位 MPC83xx PowerQUICC II Pro 特點:- 速度:267MHz 電壓:0.95 V ~ 1.05 V 安裝類型:表面貼裝 封裝/外殼:516-BBGA 裸露焊盤 供應(yīng)商設(shè)備封裝:516-PBGAPGE（27x27） 包裝:托盤 |
| GCJ0335C5C0JR50D | 制造商:MURATA 制造商全稱:Murata Manufacturing Co., Ltd. 功能描述:Chip Monolithic Ceramic Capacitors |
| GCJ0335C5C1AR50D | 制造商:MURATA 制造商全稱:Murata Manufacturing Co., Ltd. 功能描述:Chip Monolithic Ceramic Capacitors |
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