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參數(shù)資料
| 型號(hào)： | GCIXP1250-200 |
| 英文描述： | Microprocessor |
| 中文描述： | 微處理器 |
| 文件頁數(shù)： | 6/148頁 |
| 文件大?。?/td> | 1601K |
| 代理商： | GCIXP1250-200 |
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Intel
IXP1250 Network Processor
vi
Datasheet
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32-Bit Unidirectional IX Bus Timing - Consecutive Receives, EOP on
14th Data Return with Status............................................................................104
32-Bit Unidirectional IX Bus Timing - Consecutive Receives, EOP on 1st
Through 13th Data Return with Status (13th Data Return Shown)...................105
32-Bit Unidirectional IX Bus Timing - Consecutive Receives, EOP, 64-Bit
Status................................................................................................................106
32-Bit Unidirectional IX Bus Timing - Consecutive Receives, Two Element
Transfers with 32-Bit Status..............................................................................107
32-Bit Unidirectional IX Bus Timing - Consecutive Transmits, EOP .................108
32-Bit Unidirectional IX Bus Timing - Consecutive Transmits with Prepend,
EOP...................................................................................................................109
64-Bit Bidirectional IX Bus Timing - Consecutive FastPort Receives, Same
Port, EOP, No Status, FP_READY_WAIT=0....................................................110
64-Bit Bidirectional IX Bus Timing - Consecutive FastPort Receives, Same
Port, EOP, No Status, FP_READY_WAIT=5....................................................111
64-Bit Bidirectional IX Bus Timing - Consecutive FastPort Receives, Same
Port, EOP, with Status, FP_READY_WAIT=0 ..................................................112
64-Bit Bidirectional IX Bus Timing - Consecutive FastPort Receives, Same
Port, EOP, No Status, FP_READY_WAIT=5....................................................113
64-Bit Bidirectional IX Bus Timing - Consecutive FastPort Receives, Same
Port, EOP, No Status, FP_READY_WAIT=0, Cancelled Request....................114
64-Bit Bidirectional IX Bus Timing - Consecutive FastPort Receives, Same
Port, No EOP, FP_READY_WAIT=Don
’
t Care.................................................115
64-Bit Bidirectional IX Bus Timing - Consecutive FastPort Receives, Different
Ports, EOP, No Status, FP_READY_WAIT=0 ..................................................116
64-Bit Bidirectional IX Bus Timing - Consecutive FastPort Receives, Different
Ports, EOP, No Status, FP_READY_WAIT=0, Cancelled Request..................117
Consecutive Fetch Ready Flags, 1-2 MAC Mode (with No External Registered
Decoder) - RDYBUS_TEMPLATE_CTL[10]=1 .................................................118
Consecutive Fetch Ready Flags, 3+ MAC Mode (with External Decoder) -
RDYBUS_TEMPLATE_CTL[10]=0 ...................................................................118
Fetch Ready Flags, Get/Send Commands, 3+ MAC Mode (with External
Registered Decoder) - RDYBUS_TEMPLATE_CTL[10]=0...............................119
Ready Bus Control Timing, Fetch Ready Flags - Flow Control - Fetch Ready
Flags, 1-2 MAC Mode (with No External Registered Decoder) -
RDYBUS_TEMPLATE_CTL[10]=1 ...................................................................119
Ready Bus Control Timing, Fetch Ready Flags - Flow Control - Fetch Ready
Flags, 3+ MAC Mode (with External Registered Decoder) -
RDYBUS_TEMPLATE_CTL[10]=0 ...................................................................120
IX Bus Ownership Passing................................................................................121
SRAM SCLK Signal AC Parameter Measurements..........................................121
SRAM Bus Signal Timing..................................................................................122
Pipelined SRAM Read Burst of Eight Longwords .............................................124
Pipelined SRAM Write Burst of Eight Longwords .............................................125
Pipelined SRAM Read Burst of Four From Bank 0 Followed by Write Burst
of Four From Bank 8 .........................................................................................126
Pipelined SRAM Longword Write Followed by 2 Longword Burst Read
Followed by 4 Longword Burst Write ................................................................127
Flowthrough SRAM Read Burst of Eight Longwords........................................128
BootROM Read.................................................................................................129
BootROM Write.................................................................................................130
Pipelined SRAM Two Longword Burst Read Followed by BootROM Write......131
SRAM SlowPort Read.......................................................................................132
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| GCIXP1250BA | 功能描述:IC MPU NETWORK 166MHZ 520-BGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:- 標(biāo)準(zhǔn)包裝:40 系列:MPC83xx 處理器類型:32-位 MPC83xx PowerQUICC II Pro 特點(diǎn):- 速度:267MHz 電壓:0.95 V ~ 1.05 V 安裝類型:表面貼裝 封裝/外殼:516-BBGA 裸露焊盤 供應(yīng)商設(shè)備封裝:516-PBGAPGE（27x27） 包裝:托盤 |
| GCIXP1250BB | 功能描述:IC MPU NETWORK 200MHZ 520-BGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:- 標(biāo)準(zhǔn)包裝:40 系列:MPC83xx 處理器類型:32-位 MPC83xx PowerQUICC II Pro 特點(diǎn):- 速度:267MHz 電壓:0.95 V ~ 1.05 V 安裝類型:表面貼裝 封裝/外殼:516-BBGA 裸露焊盤 供應(yīng)商設(shè)備封裝:516-PBGAPGE（27x27） 包裝:托盤 |
| GCIXP1250BC | 功能描述:IC MPU NETWORK 232MHZ 520-BGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:- 標(biāo)準(zhǔn)包裝:40 系列:MPC83xx 處理器類型:32-位 MPC83xx PowerQUICC II Pro 特點(diǎn):- 速度:267MHz 電壓:0.95 V ~ 1.05 V 安裝類型:表面貼裝 封裝/外殼:516-BBGA 裸露焊盤 供應(yīng)商設(shè)備封裝:516-PBGAPGE（27x27） 包裝:托盤 |
| GCJ0335C5C0JR50D | 制造商:MURATA 制造商全稱:Murata Manufacturing Co., Ltd. 功能描述:Chip Monolithic Ceramic Capacitors |
| GCJ0335C5C1AR50D | 制造商:MURATA 制造商全稱:Murata Manufacturing Co., Ltd. 功能描述:Chip Monolithic Ceramic Capacitors |
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