參數(shù)資料
型號: GCIXF1002EDT
英文描述: Controller Miscellaneous - Datasheet Reference
中文描述: 控制器雜項-數(shù)據(jù)表參考
文件頁數(shù): 46/128頁
文件大?。?/td> 1262K
代理商: GCIXF1002EDT
Intel
IXF1002 Dual Port Gigabit Ethernet Controller
46
Datasheet
3.2.5.2
GMII Status Register
Mnemonic: GMII_STT
Address: 52H
53H
The GMII status register includes information about all modes of operations supported by the local
device and the status of Auto-Negotiation.
RESAN
9
Restart Auto-Negotiation.
When set, restarts Auto-Negotiation process. When reset, indicates normal operation.
This bit is self clearing. The value of this bit will change back to 0 when the
Auto-Negotiation process is initiated.
If Auto-Negotiation is disabled (ANENBL=0), this bit should be at a value of 0.
DUPLEX
8
Duplex mode.
This bit is fixed at the value of 1. The IXF1002 is operating only in the full-duplex mode.
COLLTST
7
Collision test.
This bit is fixed at the value of 0. The IXF1002 GPCS does not support the collision signal
test.
SPEED_1
6
Speed selection.
This bit is fixed at the value of 1 and the value of bit 13 is fixed at 0, determining a speed
selection of 1000 Mb/s
5:0
RESERVED.
Access Rules
Register
access
Bits 9, 12, 14, 15 R/W, bits 6, 7, 8, 10, 11, 13 R.
Value
after reset
1140H
Bit Name
Bit #
Bit Description
Bit Name
Bit #
Bit Description
100T4
15
100BASE-T4 ability.
This bit is fixed at the value of 0.
100XFD
14
100BASE-X full-duplex ability.
This bit is fixed at the value of 0.
100XHD
13
100BASE-X half-duplex ability.
This bit is fixed at the value of 0.
A4988-01
15
14
13
12
11
10
1
0
0
T
2
F
D
9
1
0
0
T
2
H
D
8
7
6
5
4
3
2
1
0
1
0
F
D
1
0
0
X
H
D
1
0
0
X
F
D
1
0
0
T
4
M
F
P
R
E
A
N
C
M
P
L
R
M
T
F
L
T
A
N
A
B
L
T
J
B
R
D
T
C
E
X
T
C
A
P
L
N
K
S
T
T
E
X
T
S
T
T
1
0
H
D
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