
82371AB (PIIX4)
E
226
4/9/97 2:23 PM PIIX4aDS
INTEL CONFIDENTIAL
(until publication date)
PRELIMINARY
11.3.5.13.
Device 12: Cardbus Slot (or Generic I/O and MEM Device)
Device 12 monitors a generic I/O device or Memory device with a programmable IO or memory
address or GPI20.
Its operation is the same as Device 13.
Device 12 System Events:
— PCI accesses to programmable IO addresses and memory addresses, selectable
below.
This can cause burst, or global standby
timer reloads,
IO trap SMI#, or
forwarding of the cycle from PCI to ISA. The IO address consists of a 16-bit base
address and 4-bit mask, allowing an IO address range from 1 to 16 bytes.
The memory
address consists of a 17-bit base address (AD[31:15]) and a 7-bit mask (AD[21:15]).
This provides memory ranges from 32 Kbytes to 4 Mbytes in size.
— Assertion of GPI20.
The polarity of active signal (high or low) is selectable.
It can also
be enabled as edge-triggered.
This can cause burst,
or global standby timer reloads or
IO trap SMI#.
— There is no idle timer associated with Device 12.
Device 12 IO Address Range:
Programmable IO Base Address:
Programmable IO Mask:
Device 12 Memory Address Range:
Programmable Mem Base Addr:
Programmable Memory Mask:
Device 12 Idle Timer:
NONE
GPI Enable:
GPI Polarity Select:
GPI Edge Detect Enable:
Device 12 ISA Forwarding Enable:
Global Standby Timer Reload:
Burst Timer Reload (Fast Burst Only):
[BRLD_EN_DEV12]
Trap SMI#:
[IO_EN_DEV12]
[IBASE_DEV12]
[IMASK_DEV12]
[MEM_EN_DEV12]
[MBASE_DEV12]
[MMASK_DEV12]
[GPI_EN_DEV12]
[GPI_POL_DEV12]
[GPI_EDG_DEV12]
[EIO_EN_DEV12]
[GRLD_EN_DEV12]
[TRP_EN_DEV12]
[TRP_STS_DEV12]