- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄67592 > FUSION878A (CONEXANT SYSTEMS) COLOR SIGNAL DECODER, PQFP128 PDF資料下載
參數(shù)資料
| 型號： | FUSION878A |
| 廠商： | CONEXANT SYSTEMS |
| 元件分類： | 顏色信號轉(zhuǎn)換 |
| 英文描述： | COLOR SIGNAL DECODER, PQFP128 |
| 封裝： | PLASTIC, QFP-128 |
| 文件頁數(shù)： | 151/180頁 |
| 文件大?。?/td> | 2067K |
| 代理商： | FUSION878A |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁當(dāng)前第151頁第152頁第153頁第154頁第155頁第156頁第157頁第158頁第159頁第160頁第161頁第162頁第163頁第164頁第165頁第166頁第167頁第168頁第169頁第170頁第171頁第172頁第173頁第174頁第175頁第176頁第177頁第178頁第179頁第180頁
2.0 Functional Description
Fusion 878A
2.14 Multifunction Arbiter
PCI Video Decoder
2-48
Conexant
100600B
2.14 Multifunction Arbiter
An internal arbiter is necessary to determine whether the video or audio DMA
controller claims the PCI bus when a GNT is issued to the Fusion 878A. Only one
of the two functions may actually see the GNT active during any one PCI clock
cycle. This also ensures that only one function can park on the bus. The following
rules outline the arbitration algorithm. Internal signals REQ[0:1] and GNT[0:1]
are for the video Function 0 and the audio Function 1 respectively.
2.14.1 Normal PCI Mode
The PCI REQ signal is the logical OR of the incoming function requests. The
internal GNT[0:1] signals are gated asynchronously with GNT and demultiplexed
by the audio request signal. Thus the arbiter defaults to the video function at
power-up and parks there during no requests for bus access. This is desirable
since the video will request the bus more often. However, the audio will have
highest bus access priority. Thus, the audio will have first access to the bus even
when issuing a request after the video request but before the PCI external arbiter
has granted access to the Fusion 878A. Neither function can preempt the other
once on the bus. Emptying the entire video PCI FIFO onto the PCI bus is of very
short duration compared to the bus access latency that the audio PCI FIFO can
tolerate.
2.14.2 430FX Compatibility Mode
When using the 430FX PCI, the following rules will ensure compatibility:
1.
De assert REQ at the same time as asserting FRAME.
2.
Do not reassert REQ to request another bus transaction until after finishing
the previous transaction.
Since individual bus masters do not have direct control of REQ, a simple
logical OR of video and audio requests would violate the rules. Thus, both the
arbiter and the initiator contain 430FX compatibility mode logic. To enable
430FX mode, set the EN_TBFX bit as indicated in 0x40—Device Control
When EN_TBFX is enabled, the arbiter ensures that the two compatibility
rules are satisfied. Before GNT is asserted by the PCI arbiter, this internal arbiter
may still logical OR the two requests. However, once the GNT is issued, this
arbiter must lock in its decision and now route only the granted request to the
REQ pin. The arbiter decision lock happens regardless of the state of FRAME
because it does not know when FRAME will be asserted. (Typically, each initiator
will assert FRAME on the cycle following GNT.)
When FRAME is asserted, the initiator’s responsibility is to remove its request
at the same time. The arbiter’s responsibility is to allow this request to flow
through to REQ and not allow the other request to hold REQ asserted. The
decision lock may be removed at the end of the transaction: for example, when the
bus is idle (FRAME and IRDY). The arbiter decision may then continue
asynchronously until GNT is again asserted.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| FVXO-HC53BR-FREQ | VCXO, CLOCK, 0.75 MHz - 250 MHz, HCMOS OUTPUT |
| FVXO-HC72BR-FREQ | VCXO, CLOCK, 0.75 MHz - 180 MHz, HCMOS OUTPUT |
| FVXO-HC73B-FREQ | VCXO, CLOCK, 0.75 MHz - 250 MHz, HCMOS OUTPUT |
| FVXO-LC52BR-FREQ | VCXO, CLOCK, 0.75 MHz - 1000 MHz, LVDS OUTPUT |
| FVXO-LC72BR-FREQ | VCXO, CLOCK, 0.75 MHz - 1000 MHz, LVDS OUTPUT |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| FUSZ03 | 制造商:Honeywell Sensing and Control 功能描述: |
| FUTURE 1AA PLUS | 制造商:Ansmann 功能描述: 制造商:ANSMANN AG 功能描述: |
| FUTURE 2AA PLUS | 制造商:Ansmann 功能描述: 制造商:ANSMANN AG 功能描述: |
| FUTURE 2C PLUS | 制造商:Ansmann 功能描述: 制造商:ANSMANN AG 功能描述: |
| FUTURE 3D PLUS | 制造商:Ansmann 功能描述: 制造商:ANSMANN AG 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。