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參數(shù)資料
| 型號： | E28F320J5-120 |
| 廠商： | INTEL CORP |
| 元件分類： | PROM |
| 英文描述： | StrataFlash MEMORY TECHNOLOGY 32 AND 64 MBIT |
| 中文描述： | 2M X 16 FLASH 5V PROM, 150 ns, PDSO56 |
| 封裝： | 14 X 20 MM, TSOP-56 |
| 文件頁數(shù)： | 37/51頁 |
| 文件大?。?/td> | 651K |
| 代理商： | E28F320J5-120 |
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28F320J5 and 28F640J5
42
Datasheet
DC Characteristics, Continued
NOTES:
1. All currents are in RMS unless otherwise noted. These currents are valid for all product versions (packages
and speeds). Contact Intel’s Application Support Hotline or your local sales office for information about typical
specifications.
2. Includes STS.
3. CMOS inputs are either VCC ± 0.2 V or GND ± 0.2 V. TTL inputs are either VIL or VIH.
4. Add 5 mA for VCCQ =VCCQ2 min.
5. Sampled, not 100% tested.
6. ICCES is specified with the device de-selected. If the device is read or written while in erase suspend mode,
the device’s current draw is ICCR or ICCW.
7. Tie VPEN to VCC (4.5 V–5.5 V).
8. Block erases, programming, and lock-bit configurations are inhibited when VPEN ≤ VPENLK, and not
guaranteed in the range between VPENLK (max) and VPENH (min), and above VPENH (max).
9. Block erases, programming, and lock-bit configurations are inhibited when VCC <VLKO, and not guaranteed
in the range between VLKO (min) and VCC (min), and above VCC (max).
10.Master lock-bit set operations are inhibited when RP# = VIH. Block lock-bit configuration operations are
inhibited when the master lock-bit is set and RP# = VIH. Block erases and programming are inhibited when
the correspondingblock-lock bit is set and RP# = VIH. Block erase, program, and lock-bit configuration
operations are not guaranteed and should not be attempted with VIH <RP# <VHH.
11.RP# connection to a VHH supply is allowed for a maximum cumulative period of 80 hours.
Symbol
Parameter
Notes
Min
Max
Unit
Test Conditions
VIL
Input Low Voltage
5
–0.5
0.8
V
VIH
Input High Voltage
5
2.0
VCC
+0.5
V
VOL
Output Low Voltage
2,5
0.45
V
VCCQ =VCCQ1 Min, IOL =5.8 mA
0.4
V
VCCQ =VCCQ2 Min, IOL =2 mA
VOH
Output High Voltage
3,7
2.4
V
VCCQ =VCCQ1 Min or VCCQ =VCCQ2 Min
IOH =–2.5 mA(VCCQ1)
–2 mA (VCCQ2)
0.85 X
VCCQ
V
VCCQ =VCCQ1 Min or VCCQ =VCCQ2 Min
IOH =–2.5 mA
VCCQ
–0.4
V
VCCQ =VCCQ1 Min or VCCQ =VCCQ2 Min
IOH =–100 A
VPENLK
VPEN Lockout duringNormal
Operations
5,7,8
3.6
V
VPENH
VPEN duringBlock Erase,
Program, or Lock-Bit Operations
7,8
4.5
5.5
V
VLKO
VCC Lockout Voltage
9
3.25
V
VHH
RP# Unlock Voltage
10,11
11.4
12.6
V
Set master lock-bit
Override lock-bit
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相關(guān)代理商/技術(shù)參數(shù) |
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| E28F400B5B80 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Intel 功能描述: |
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