參數(shù)資料
型號： E28F320J5-120
廠商： INTEL CORP
元件分類： PROM
英文描述： StrataFlash MEMORY TECHNOLOGY 32 AND 64 MBIT
中文描述： 2M X 16 FLASH 5V PROM, 150 ns, PDSO56
封裝： 14 X 20 MM, TSOP-56
文件頁數(shù)： 28/51頁
文件大小： 651K
代理商： E28F320J5-120
28F320J5 and 28F640J5
34
Datasheet
0606_09
Figure 8. Block Erase Flowchart
Start
Read
Status Register
SR.7 =
Erase Flash
Block(s) Complete
0
1
Full Status
Check if Desired
Suspend Erase
Issue Single Block Erase
Command 20H, Block
Address
Suspend
Erase Loop
Write Confirm D0H
Block Address
Yes
No
Bus
Operation
Command
Comments
Write
Erase Block
Data = 20H
Addr = Block Address
Write (Note 1)
Erase
Confirm
Data = D0H
Addr = X
Read
Status register data
With the device enabled,
OE# low updates SR
Addr = X
Standby
Check SR.7
1 = WSM Ready
0= WSM Busy
1. The Erase Confirm byte must follow Erase Setup.
This device does not support erase queuing. Please see
Application note AP-646 For software erase queuing
compatibility.
Full status check can be done after all erase and write
sequences complete. Write FFH after the last operation to
reset the device to read array mode.
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