參數(shù)資料
型號(hào)： E28F320J5-120
廠商： INTEL CORP
元件分類： PROM
英文描述： StrataFlash MEMORY TECHNOLOGY 32 AND 64 MBIT
中文描述： 2M X 16 FLASH 5V PROM, 150 ns, PDSO56
封裝： 14 X 20 MM, TSOP-56
文件頁數(shù)： 15/51頁
文件大?。?/td> 651K
代理商： E28F320J5-120
28F320J5 and 28F640J5
22
Datasheet
4.2.5
System Interface Information
The following device information can optimize system interface software.
Table 10. System Interface Information
Offset
Length
Description
Add.
Hex
Code
Value
1Bh
1
VCC logic supply minimum program/erase voltage
bits 0–3 BCD 100 mV
bits 4–7 BCD volts
1B:
--45
4.5 V
1Ch
1
VCC logic supply maximum program/erase voltage
bits 0–3 BCD 100 mV
bits 4–7 BCD volts
1C:
--55
5.5 V
1Dh
1
VPP [programming] supply minimum program/erase voltage
bits 0–3 BCD 100 mV
bits 4–7 HEX volts
1D:
--00
0.0 V
1Eh
1
VPP [programming] supply maximum program/erase voltage
bits 0–3 BCD 100 mV
bits 4–7 HEX volts
1E:
--00
0.0 V
1Fh
1
“n” such that typical single word program time-out = 2n s
1F:
--07
128 s
20h
1
“n” such that typical max. buffer write time-out = 2n s
20:
--07
128 s
21h
1
“n” such that typical block erase time-out = 2n ms
21:
--0A
1 s
22h
1
“n” such that typical full chip erase time-out = 2n ms
22:
--00
NA
23h
1
“n” such that maximum word program time-out = 2n times
typical
23:
--04
2 ms
24h
1
“n” such that maximum buffer write time-out = 2n times typical
24:
--04
2 ms
25h
1
“n” such that maximum block erase time-out = 2n times typical
25:
--04
16 s
26h
1
“n” such that maximum chip erase time-out = 2n times typical
26:
--00
NA
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