參數(shù)資料
型號(hào)： CYP15G0403DXB
廠商： Cypress Semiconductor Corp.
英文描述： Independent Clock Quad HOTLink II Transceiver(獨(dú)立時(shí)鐘，四熱連接II收發(fā)器)
中文描述： 獨(dú)立時(shí)鐘四路HOTLink II收發(fā)器（獨(dú)立時(shí)鐘，四熱連接二收發(fā)器）
文件頁(yè)數(shù)： 29/43頁(yè)
文件大?。?/td> 744K
代理商： CYP15G0403DXB
CYV15G0403DXB
CYW15G0403DXB
CYP15G0403DXB
Document #: 38-02065 Rev. *E
Page 29 of 43
t
FALL[20]
CML Output Fall Time 80
20% (CML Test Load)
SPDSELx = HIGH
SPDSELx = MID
SPDSELx =LOW
IEEE 802.3z
IEEE 802.3z
60
100
180
270
500
1000
27
11
TBD
200
ps
ps
ps
ps
ps
t
DJ [20, 31, 33]
t
RJ[20, 32, 33]
t
REFJ[20]
t
TXLOCK
CYP(V)(W)15G0403DXB Receive Serial Inputs and CDR PLL Characteristics
Over the Operating Range
t
RXLOCK
Receive PLL lock to input data stream (cold start)
Receive PLL lock to input data stream
t
RXUNLOCK
Receive PLL Unlock Rate
t
JTOL[20]
t
DJTOL[20]
Deterministic Jitter (peak-peak)
[34]
Random Jitter (
σ
)
[34]
REFCLKx jitter tolerance / Phase noise limits
Transmit PLLx lock to REFCLKx±
μ
s
376k
376k
46
UI
UI
UI
ps
ps
Total Jitter Tolerance
[34]
Deterministic Jitter Tolerance
[34]
IEEE 802.3z
IEEE 802.3z
600
370
Capacitance
[20]
Parameter
C
INTTL
C
INPECL
Description
Test Conditions
Max.
7
4
Unit
pF
pF
TTL Input Capacitance
PECL input Capacitance
T
A
= 25°C, f
0
= 1 MHz, V
CC
= 3.3V
T
A
= 25°C, f
0
= 1 MHz, V
CC
= 3.3V
CYP(V)(W)15G0403DXB AC Electrical Characteristics
(continued)
Parameter
Description
Min.
Max
Unit
CYP(V)(W)15G0403DXB HOTLink II Transmitter Switching Waveforms
Notes:
31. While sending continuous K28.5s, outputs loaded to a balanced 100
load, measured at the cross point of differential outputs, over the operating range.
32. While sending continuous K28.7s, after 100,000 samples measured at the cross point of differential outputs, time referenced to REFCLKx± input, over the
operating range.
33. Total jitter is calculated at an assumed BER of 1E
12. Hence: Total Jitter (t
) = (t
* 14) + t
.
34. Also meets all Jitter Generation and Jitter Tolerance requirements as specified by SMPTE 259M, SMPTE 292M, ESCON, FICON, Fibre Channel, and DVB-ASI.
TXCLKx
TXDx[7:0],
TXCTx[1:0],
t
TXDH
t
TXDS
t
TXCLK
t
TXCLKH
t
TXCLKL
Transmit Interface
Write Timing
TXCLKx selected
REFCLKx
Transmit Interface
Write Timing
REFCLKx selected
t
REFCLK
t
REFH
t
REFL
t
TREFDS
t
TREFDH
TXRATEx = 0
TXDx[7:0],
TXCTx[1:0],
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CYP15G0403DXB_07 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Independent Clock Quad HOTLink II⑩ Transceiver
CYP15G0403DXB_09 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Independent Clock Quad HOTLink II Transceiver
CYP15G0403DXB_11 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Independent Clock Quad HOTLink II Transceiver Single 3.3V supply
CYP15G0403DXB-BGC 功能描述:電信線路管理 IC Quad Indep Channel XCVR COM RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray
CYP15G0403DXB-BGI 功能描述:電信線路管理 IC Quad Indep Channel XCVR IND RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray
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