參數(shù)資料
型號(hào)： CYP15G0403DXB
廠商： Cypress Semiconductor Corp.
英文描述： Independent Clock Quad HOTLink II Transceiver(獨(dú)立時(shí)鐘，四熱連接II收發(fā)器)
中文描述： 獨(dú)立時(shí)鐘四路HOTLink II收發(fā)器（獨(dú)立時(shí)鐘，四熱連接二收發(fā)器）
文件頁(yè)數(shù)： 2/43頁(yè)
文件大?。?/td> 744K
代理商： CYP15G0403DXB
CYV15G0403DXB
CYW15G0403DXB
CYP15G0403DXB
Document #: 38-02065 Rev. *E
Page 2 of 43
The CYW15G0403DXB
[1]
operates from 195 to 1540 MBaud,
which includes operation at the OBSAI RP3 datarate of both
1536 MBaud and 768 MBaud.
The CYV15G0403DXB satisfies the SMPTE-259M and
SMPTE-292M compliance as per SMPTE EG34-1999 Patho-
logical Test Requirements.
As
a
second-generation
CYP(V)(W)15G0403DXB extends the HOTLink family with
enhanced levels of integration and faster data rates, while
maintaining serial-link compatibility (data, command, and
BIST) with other HOTLink devices. The transmit (TX) section
of the CYP(V)(W)15G0403DXB Quad HOTLink II consists of
four independent byte-wide channels. Each channel can
accept either 8-bit data characters or preencoded 10-bit trans-
mission characters. Data characters may be passed from the
Transmit Input Register to an integrated 8B/10B Encoder to
improve their serial transmission characteristics. These
encoded characters are then serialized and output from dual
Positive ECL (PECL) compatible differential transmission-line
drivers at a bit-rate of either 10- or 20-times the input reference
clock for that channel.
The receive (RX) section of the CYP(V)(W)15G0403DXB
Quad HOTLink II consists of four independent byte-wide
channels. Each channel accepts a serial bit-stream from one
of two PECL-compatible differential line receivers, and using
a completely integrated Clock and Data Recovery PLL,
CYP(V)(W)15G0403DXB Transceiver Logic Block Diagram
HOTLink
device,
the
recovers the timing information necessary for data recon-
struction. Each recovered bit-stream is deserialized and
framed into characters, 8B/10B decoded, and checked for
transmission errors. Recovered decoded characters are then
written to an internal Elasticity Buffer, and presented to the
destination host system.
The integrated 8B/10B encoder/decoder may be bypassed for
systems that present externally encoded or scrambled data at
the parallel interface.
The parallel I/O interface may be configured for numerous
forms of clocking to provide the highest flexibility in system
architecture. In addition to clocking the transmit path with a
local reference clock, the receive interface may also be
configured to present data relative to a recovered clock or to a
local reference clock.
Each transmit and receive channel contains an independent
BIST pattern generator and checker. This BIST hardware
allows at-speed testing of the high-speed serial data paths in
each transmit and receive section, and across the intercon-
necting links.
The CYP(V)(W)15G0403DXB is ideal for port applications
where different data rates and serial interface standards are
necessary for each channel. Some applications include multi-
protocol routers, aggregation equipment, and switches.
x10
Serializer
Phase
Align
Buffer
Encoder
8B/10B
Decoder
8B/10B
x11
Framer
Deserializer
TX
RX
x10
Serializer
Encoder
8B/10B
Decoder
8B/10B
x11
Framer
Deserializer
TX
RX
x10
Serializer
Encoder
8B/10B
Decoder
8B/10B
x11
Framer
Deserializer
TX
RX
x10
Serializer
Encoder
8B/10B
Decoder
8B/10B
x11
Framer
Deserializer
TX
RX
T
R
T
R
T
R
T
R
O
±
O
±
I
±
I
±
O
±
O
±
I
±
I
±
O
±
O
±
I
±
I
±
O
±
O
±
I
±
I
±
Phase
Align
Buffer
Phase
Align
Buffer
Phase
Align
Buffer
Elasticity
Buffer
Elasticity
Buffer
Elasticity
Buffer
Elasticity
Buffer
T
R
T
R
T
R
T
R
R
R
R
R
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CYV15G0403DXB Independent Clock Quad HOTLink II Transceiver(獨(dú)立時(shí)鐘，四熱連接II收發(fā)器)
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參數(shù)描述
CYP15G0403DXB_07 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Independent Clock Quad HOTLink II⑩ Transceiver
CYP15G0403DXB_09 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Independent Clock Quad HOTLink II Transceiver
CYP15G0403DXB_11 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Independent Clock Quad HOTLink II Transceiver Single 3.3V supply
CYP15G0403DXB-BGC 功能描述:電信線路管理 IC Quad Indep Channel XCVR COM RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray
CYP15G0403DXB-BGI 功能描述:電信線路管理 IC Quad Indep Channel XCVR IND RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray
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