參數(shù)資料
型號(hào)： AMIS-53000-M
英文描述： Frequency Agile Transceiver
中文描述： 捷變頻收發(fā)器
文件頁(yè)數(shù)： 25/99頁(yè)
文件大?。?/td> 2638K
代理商： AMIS-53000-M
AMIS-53000
Frequency Agile Transceiver
Data Sheet
Figure 16: 3-Wire Serial Data Interface
5.9 System Clock
The system clock can provide a clock to the external host controller. The clock can be divided down from the 24MHz crystal frequency
of the AMIS-53000. When a design desires to use the system clock as the clock to an external host/controller, the system clock can be
output under the following:
Will be output in RX or TX, unless the output is off in general options B (Bit 1:0).
The output will start back up in idle mode after a packet is received.
The output will start back up in housekeeping if wake up external host/controller is enabled in housekeeping configuration
(Bit 6).
Table 10: System Clock Control
Mode
Control
Bits
Outputs
0X0D General Options B
1:0
Frequency: 12, 6, 3MHz or off
RX
TX
2:1
POR state: standby, idle, RX, TX
Standby
General Options A
0
Output in standby
Idle
Idle Config
4:3
Clock cycles before stop
Comments
5.10 Power and Grounds
The AMIS-53000 has four different power inputs and two different grounds. This allows the design of the AMIS-53000 in an application
to separate RF power from the analog and digital power. The same applies to the grounds, where a separate ground plane for the RF
grounds can reduce the amount of noise induced into the sensitive RF circuits.
25
AMI Semiconductor
– Aug. 05, Rev. 1.0
www.amis.com
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