
AMD-K5 Processor
47
21062E/0—June 1997
AMD K86 Family BIOS and Software Tools Developers Guide
Preliminary Information
IDCODE.
The execution of the IDCODE instruction connects the
device identification register between TDI and TDO. Upon
such connection, the device identification code can be shifted
out of the register.
HIGHZ.
This instruction forces all output and bidirectional pins
into a tri-state condition. When this instruction is selected, the
bypass register is selected for shifting between TDI and TDO. A
signal called HIZEXT is responsible for forcing the tri-state to
occur. This signal is generated in the TAP block, underneath
JTAG_BIST, and goes to the PAD_TOP block.
ALL1.
This instruction forces all output and bidirectional pins to
a High logic level.
The ALL1 instruction, like the
HIGHZ
instruction, selects the
bypass register for shifting between TDI and TDO. A signal
called ALL1 is responsible for forcing the pins to a High state.
This signal is generated in the TAP block underneath
JTAG_BIST and goes to the PAD_TOP block. In the PAD_TOP
block, this signal goes to boundary scan cells called
BSLCD_OUT. The DOUT pins of the BSLCD_OUT cells are
forced High when ALL1 is High. The SELPDR signal selects the
boundary scan cells as the source for driving the outputs if the
SELPDR signal is High. The SELPDR signal is also generated in
the TAP block underneath JTAG_BIST and goes to the
PAD_TOP block.
ALL0.
This instruction forces all output and bidirectional pins to
a Low logic level.
The ALL0 instruction, like the
HIGHZ
instruction, selects the
bypass register for shifting between TDI and TDO. A signal
called ALL0 is responsible for forcing the pins to a Low state.
This signal is generated in the TAP block underneath
JTAG_BIST and goes to the PAD_TOP block. In the PAD_TOP
block, this signal goes to boundary scan cells called
BSLCD_OUT. The DOUT pins of the BSLCD_OUT cells are
forced Low when ALL0 is High. The SELPDR signal selects the
boundary scan cells as the source for driving the outputs if the
SELPDR signal is High. The SELPDR signal is also generated in
the TAP block underneath JTAG_BIST and goes to the
PAD_TOP block.