參數(shù)資料
型號(hào): AM79C971
廠商: Advanced Micro Devices, Inc.
英文描述: PCnet⑩-FAST Single-Chip Full-Duplex 10/100 Mbps Ethernet Controller for PCI Local Bus
中文描述: PCnet⑩快速單芯片全雙工10/100 Mbps以太網(wǎng)控制器,PCI總線
文件頁(yè)數(shù): 61/265頁(yè)
文件大?。?/td> 3190K
代理商: AM79C971
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Am79C971
61
the MAC engine will automatically delete the frame
from the receive FIFO, without host intervention. The
Am79C971 controller has the ability to accept runt
packets for diagnostic purposes and proprietary net-
works.
Destination Address Handling
The first 6 bytes of information after SFD will be inter-
preted as the destination address field. The MAC engine
provides facilities for physical (unicast), logical (multi-
cast), and broadcast address reception.
Error Detection
The MAC engine provides several facilities which re-
port and recover from errors on the medium. In addi-
tion, it protects the network from gross errors due to
inability of the host to keep pace with the MAC engine
activity.
On completion of transmission, the following transmit
status is available in the appropriate Transmit Message
Descriptor (TMD) and Control and Status Register
(CSR) areas:
I
The number of transmission retry attempts (1,
MORE, RTRY, and TRC).
I
Whether the MAC engine had to Defer (DEF) due to
channel activity.
I
Excessive deferral (EXDEF), indicating that the
transmitter experienced Excessive Deferral on this
transmit frame, where Excessive Deferral is defined
in the ISO 8802-3 (IEEE/ANSI 802.3) standard.
I
Loss of Carrier (LCAR), indicating that there was an
interruption in the ability of the MAC engine to mon-
itor its own transmission. Repeated LCAR errors in-
dicate a potentially faulty transceiver or network
connection.
I
Late Collision (LCOL) indicates that the transmis-
sion suffered a collision after the slot time. This is in-
dicative of a badly configured network. Late
collisions should not occur in a normal operating
network.
I
Collision Error (CERR) indicates that the trans-
ceiver did not respond with an SQE Test message
within the first 4
μ
s after a transmission was com-
pleted. This may be due to a failed transceiver, dis-
connected or faulty transceiver drop cable, or
because the transceiver does not support this fea-
ture (or it is disabled). SQE Test is only valid for 10-
Mbps networks.
In addition to the reporting of network errors, the MAC
engine will also attempt to prevent the creation of any
network error due to the inability of the host to service
the MAC engine. During transmission, if the host fails
to keep the transmit FIFO filled sufficiently, causing an
underflow, the MAC engine will guarantee the message
is either sent as a runt packet (which will be deleted by
the receiving station) or as an invalid FCS (which will
also cause the receiver to reject the message).
The status of each receive message is available in the
appropriate Receive Message Descriptor (RMD) and
CSR areas. All received frames are passed to the host
regardless of any error. The FRAM error will only be re-
ported if an FCS error is detected and there is a non-
integral number of bytes in the message.
During the reception, the FCS is generated on every
nibble (including the dribbling bits) coming from the ca-
ble, although the internally saved FCS value is only up-
dated on the eighth bit (on each byte boundary). The
MAC engine will ignore up to 7 additional bits at the end
of a message (dribbling bits), which can occur under
normal network operating conditions. The framing error
is reported to the user as follows:
I
If the number of dribbling bits are 1 to 7 and there is
no FCS error, then there is no Framing error (FRAM
= 0).
I
If the number of dribbling bits are 1 to 7 and there is
a FCS error, then there is also a Framing error
(FRAM = 1).
I
If the number of dribbling bits is 0, then there is no
Framing error. There may or may not be a FCS er-
ror.
I
If the number of dribbling bits is EIGHT, then there
is no Framing error. FCS error will be reported and
the receive message count will indicate one extra
byte.
Note that if the MAC engine detects a received frame
which has a 00b pattern in the preamble (after the first
8-bits which are ignored), the entire frame will be ig-
nored. The MAC engine will wait for the network to go
inactive before attempting to receive additional frames.
Media Access Management
The basic requirement for all stations on the network is
to provide fairness of channel allocation. The IEEE
802.3/Ethernet protocols define a media access mech-
anism which permits all stations to access the channel
with equality. Any node can attempt to contend for the
channel by waiting for a predetermined time (Inter
Packet Gap) after the last activity, before transmitting
on the media. The channel is a multidrop communica-
tions media (with various topological configurations
permitted), which allows a single station to transmit and
all other stations to receive. If two nodes simulta-
neously contend for the channel, their signals will inter-
act causing loss of data, defined as a collision. It is the
responsibility of the MAC to attempt to avoid and
recover from a collision, to guarantee data integrity for
the end-to-end transmission to the receiving station.
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相關(guān)代理商/技術(shù)參數(shù)
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