Am79C971
149
P R E L I M I N A R Y
Note that several registers have no default value.
BCR0, BCR1, BCR3, BCR8, BCR10-17, and BCR21
are reserved and have undefined values. BCR2 and
BCR34 are not observable without first being pro-
grammed through the EEPROM read operation or a
user register write operation.
BCR0, BCR1, BCR16, BCR17, and BCR21 are regis-
ters that are used by other devices in the PCnet family.
Writing to these registers have no effect on the opera-
tion of the Am79C971 controller.
Writes to those registers marked as
“
Reserved
”
will
have no effect. Reads from these locations will produce
undefined values.
BCR0: Master Mode Read Active
Bit
Name
Description
31-16 RES
Reserved locations. Written as
zeros and read as undefined.
15-0
MSRDA
Reserved
H_RESET, the value in this regis-
ter will be 0005h. The setting of
this register has no effect on any
Am79C971 controller function. It
is only included for software com-
patibility with other PCnet family
devices.
locations.
After
Read always. MSRDA is read
only. Write operations have no ef-
fect.
Table 30.
BCR Registers
RAP
0
1
2
3
4
5
6
7
8
9
10-15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
Mnemonic
MSRDA
MSWRA
MC
Reserved
LED0
LED1
LED2
LED3
Reserved
FDC
Reserved
IOBASEL
IOBASEU
BSBC
EECAS
SWS
INTCON
PCILAT
PCISID
PCISVID
SRAMSIZ
SRAMB
SRAMIC
EBADDRL
EBADDRU
EBD
STVAL
MIICAS
MIIADDR
MIIMDR
PCIVID
Default
0005h
0005h
0002h
N/A
00C0h
0084h
0088h
0090h
N/A
0000h
N/A
N/A
N/A
9001h
0002h
0000h
N/A
FF06h
0000h
0000h
0000h
0000h
0000h
N/A
N/A
N/A
FFFFh
0000h
0000h
N/A
1022h
Name
Reserved
Reserved
Programmability
User
No
No
Yes
No
Yes
Yes
Yes
Yes
No
Yes
No
No
No
Yes
Yes
Yes
No
Yes
No
No
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
EEPROM
No
No
Yes
No
Yes
Yes
Yes
Yes
No
Yes
No
No
No
Yes
No
No
No
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
No
Yes
Yes
No
Yes
Miscellaneous Configuration
Reserved
LED0 Status
LED1 Status
LED2 Status
LED3 Status
Reserved
Full-Duplex Control
Reserved
Reserved
Reserved
Burst and Bus Control
EEPROM Control and Status
Software Style
Reserved
PCI Latency
PCI Subsystem ID
PCI Subsystem Vendor ID
SRAM Size
SRAM Boundary
SRAM Interface Control
Expansion Bus Address Lower
Expansion Bus Address Upper
Expansion Bus Data Port
Software Timer Value
MII Control and Status
MII Address
MII Management Data
PCI Vendor ID