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參數(shù)資料
| 型號： | ADUC834BS |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | MicroConverter, Dual 16-/24- Bit ADCs with Embedded 62KB FLASH MCU |
| 中文描述： | 8-BIT, FLASH, 12.58 MHz, MICROCONTROLLER, PQFP52 |
| 封裝： | 14 X 14 MM, MO-022-AC-1, MQFP-52 |
| 文件頁數(shù)： | 50/72頁 |
| 文件大?。?/td> | 1451K |
| 代理商： | ADUC834BS |
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(12 March 2002) REV.
P
rC
ADuC834
–
50
–
PRELIMINARY TECHNICAL DATA
POWE R SUPPLY MONIT OR
As its name suggests, the Power Supply Monitor, once en-
abled, monitors both supplies (AVDD or DVDD) on the
ADuC834. It will indicate when any of the supply pins drop
below one of four user-selectable voltage trip points from
2.63 V to 4.63 V. For correct operation of the Power Supply
Monitor function, AV
DD
must be equal to or greater than
2.7 V. Monitor function is controlled via the PSMCON SFR.
If enabled via the IEIP2 SFR, the monitor will interrupt the
core using the PSMI bit in the PSMCON SFR. T his bit will
not be cleared until the failing power supply has returned
above the trip point for at least 250 ms. T his monitor function
allows the user to save working registers to avoid possible data
loss due to the low supply condition, and also ensures that
normal code execution will not resume until a safe supply
level has been well established. T he supply monitor is also
protected against spurious glitches triggering the interrupt
circuit.
PSMC ON
SFR Address
Power-On Default Value
Bit Addressable
Power Supply Monitor C ontrol Register
DFH
DEH
No
T able X X . PSMCON SFR Bit Designations
Bit
Name
Description
7
CMPD
DVDD Comparator Bit
T his is a read-only bit and directly reflects the state of the DVDD comparator.
Read
‘
1
’
indicates the DVDD supply is above its selected trip point.
Read
‘
0
’
indicates the DVDD supply is below its selected trip point.
AVDD Comparator Bit.
T his is a read-only bit and directly reflects the state of the AVDD comparator.
Read
‘
1
’
indicates the AVDD supply is above its selected trip point.
Read
‘
0
’
indicates the AVDD supply is below its selected trip point.
Power Supply Monitor Interrupt Bit.
T his bit will be set high by the MicroConverter if either CMPA or CMPD are low, indicating
low analog or digital supply. T he PSMI bit can be used to interrupt the processor. Once CMPD
and/or CMPA return (and remain) high, a 250 ms counter is started. When this counter times
out, the PSMI interrupt is cleared. PSMI can also be written by the user. However, if either com-
parator output is low, it is not possible for the user to clear PSMI.
DVDD T rip Point Selection Bits.
T hese bits select the DVDD trip-point voltage as follows:
T PD1
T PD0
Selected DVDD T rip Point (V)
0
0
4.63
0
1
3.08
1
0
2.93
1
1
2.63
AVDD T rip Point Selection Bits.
T hese bits select the AVDD trip-point voltage as follows:
T PA1
T PA0
Selected AVDD T rip Point (V)
0
0
4.63
0
1
3.08
1
0
2.93
1
1
2.63
Power Supply Monitor Enable Bit.
Set
to
‘
1
’
by the user to enable the Power Supply Monitor Circuit.
Cleared
to
‘
0
’
by the user to disable the Power Supply Monitor Circuit.
6
CMPA
5
PSMI
4
3
T PD1
T PD0
2
1
T PA1
T PA0
0
PSMEN
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