參數(shù)資料
型號: 84301
廠商: LSI Corporation
英文描述: 4-Port Fast Ethernet Controller( 4端口快速以太網(wǎng)控制器)
中文描述: 4端口快速以太網(wǎng)控制器(4端口快速以太網(wǎng)控制器)
文件頁數(shù): 9/62頁
文件大?。?/td> 606K
代理商: 84301
84301 4-Port
Fast Ethernet Controller
4-9
MD400158/D
Pin
Pin Name
I/O
Description
169
RXC_3
I
Receive Clock Port 3
In standard 10Mbit/sec Serial Mode, this input is a 10Mhz, 50% duty cycle nominal
receive clock which is used to synchronize incoming data from the decoder to port
#3. In 10Mbit/sec Serial Mode CSN and RXD0_3 are assumed to transition from the
leading edge of this clock. In MII mode this clock is a 2.5/25 Mhz, 50% duty cycle
receive clock that synchronizes incoming nibble wide data from the decoder to port
#3. In MII mode data and the RXDV signal are assumed to transition from the falling
edge of the clock.
188
RXC_4
I
Receive Clock Port 4
In standard 10Mbit/sec Serial Mode, this input is a 10Mhz, 50% duty cycle nominal
receive clock which is used to synchronize incoming data from the decoder to port
#4. In 10Mbit/sec Serial Mode CSN and RXD0_4 are assumed to transition from the
leading edge of this clock. In MII mode this clock is a 2.5/25 Mhz, 50% duty cycle
receive clock that synchronizes incoming nibble wide data from the decoder to port
#4. In MII mode data and the RXDV signal are assumed to transition from the falling
edge of the clock.
131, 133
136, 137
RXD[3:0]_1
I
Receive Data Port 1
In standard 10 Mbit/sec Serial Mode, RXD0_1 is the serial input data to port #1 from
the decoder. In MII mode, these inputs are driven with a nibble of receive data every
falling edge of the RXC_1 clock from the encoder to port #1.
149, 150
151, 160
RXD[3:0]_2
I
Receive Data Port 2
In standard 10 Mbit/sec Serial Mode, RXD0_2 is the serial input data to port #2 from
the decoder. In MII mode, these inputs are driven with a nibble of receive data every
falling edge of the RXC_2 clock from the encoder to port #2.
172-175
RXD[3:0]_3
I
Receive Data Port 3
In standard 10 Mbit/sec Serial Mode, RXD0_3 is the serial input data to port #3 from
the decoder. In MII mode, these inputs are driven with a nibble of receive data every
falling edge of the RXC_3 clock from the encoder to port #3.
192
RXD[3:0]_4
I
Receive Data Port 4
In standard 10 Mbit/sec Serial Mode, RXD0_4 is the serial input data to port #4 from
the decoder. In MII mode, these inputs are driven with a nibble of receive data every
falling edge of the RXC_4 clock from the encoder to port #4.
194-196
130
CSN_1
I
Carrier Sense Port 1
This is port #1's carrier sense input which indicates there is traffic on the transmission
medium connected to port #1. Carrier sense becomes active with the first bit of the
Preamble received, and inactive one bit time after the last bit of the frame is received.
This is an active high input.
129
RX_DV_1
I
Receive Data Valid Port 1
In MII mode this input is receive data valid. Receive data valid becomes active with
the first nibble of synchronized and decoded Preamble or SFD appearing on the
RXD[3:0]_1 lines and goes inactive one clock time after the last nibble of the frame
is received. This is an active high input.
148
CSN_2
I
Carrier Sense Port 2
This is port #2's carrier sense input which indicates there is traffic on the transmission
medium connected to port #2. Carrier sense becomes active with the first bit of the
Preamble received, and inactive one bit time after the last bit of the frame is received.
This is an active high input.
Pin Description (cont.)
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