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參數(shù)資料
| 型號： | 84301 |
| 廠商： | LSI Corporation |
| 英文描述： | 4-Port Fast Ethernet Controller( 4端口快速以太網(wǎng)控制器) |
| 中文描述： | 4端口快速以太網(wǎng)控制器（4端口快速以太網(wǎng)控制器） |
| 文件頁數(shù)： | 60/62頁 |
| 文件大?。?/td> | 606K |
| 代理商： | 84301 |
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84301 4-Port
Fast Ethernet Controller
4-60
MD400158/D
Revision History
Page 32: - Mode E: Receive Without Discard Mode has been added.
- Mode F1/F2, Last paragraph, ...Mode F2: Reading this bit provides SQE status. The SQE function is always
on; reading this register causes an automatic reset of this bit value... has been changed to ...Mode
F2: Reading this bit provides SQE test result. The SQE function is always on; reading this register causes an
automatic reset of this bit value to “zero”.
Page 34: - 3.6.6.1 FIFO Threshold Register Setting Table has been changed to 3.6.8.1 FIFO Threshold Register
Setting Table.
Page 36: - 3.6.11 Full Duplex Status Register has been added.
- Note 1. ...(See Section 3.1) has been changed to (See Section 3.6.7).
Page 42: - Absolute Maximum Ratings
- A new Absolute Maximum Ratings has been added, and Operating Conditions has been deleted.
- 4.0 DC Characteristics
- V
CH
Limits (Min) has been changed from 4.0 to 2.4.
- V
CH
Limits (Max) has been deleted.
- V
CL
Limits (Max) has been changed from 1.0 to 0.6.
- V
IH1
Limits (Max) has been deleted.
Page 43: AC Characteristics
- Symbol, THAR has changed to THA, THRS has changed to THPS, THDA has changed to THCS, TSAR has
changed to TSA, TSRS has changed to TSPS, TWCH has changed to TRWH, TWCL has changed to TRWL.
- All Conditions have been deleted.
- Symbols, THEN, TSEN, TWWH and TWWL have been added.
- THPS, Parameter REGPS[1:0]/ENREGIO Hold has been changed to REGPS[1:0] Hold.
- TSPS, Parameter REGPS[1:0]/ENREGIO Setup has been changed to REGPS[1:0] Setup.
- TRWH, Parameter reference to RD/WR has been changed RD.
- TRWL, Parameter reference to RD/WR has been changed RD.
Page 44: - Figures 5.01 Command/Status Interface Read Timing, and 5.02 Command/Status Interface Write Timing
have replaced Figure 5.0 Command Status Interface Timing.
Page 45: - Figures 6.01 Ethernet Transmit Interface Timing and 6.02 Ethernet Receive Interface Timing have replaced
Figures 6.0 Ethernet Transmit Interface Timing, and 7.0 Receive Interface Timing.
- 6.0 Ethernet Transmit and Receive Interface Timing has replaced AC Characteristics Ethernet Transmit
Interface Timing, and AC Characteristics Receive Interface Timing.
Page 46: - 7.0 Transmit Data Interface Timing Table has replaced Transmit Data Interface Timing Table.
Page 47: - Figure, 7.01 Transmit Data Interface Write Timing 1 has been added, and replaces Figure 8.0 Transmit
Data Interface Timing.
Page 48: - Figure, 7.02 Transmit Data Interface Write Timing 2 has been added, and replaces Figure 8.0 Transmit
Data Interface Timing.
Page 49: - 8.0 Receive Data Interface Timing has been added and replaces Receive Data Interface Timing.
Page 50: - Figure 8.01 Receive Data Interface Timing 1, has been added, and replaces Figure 9.0 Receive Data
Interface Timing.
Page 51: - Figure 8.02 Receive Data Interface Timing 2, has been added, and replaces Figure 9.0 Receive Data
Interface Timing.
Page 52: - 9.0 Transmit Data Interface Timing on Exception Conditions has been added.
Page 53: - Figure 9.01 Transmit Data Interface Timing on Exception Conditions has been added.
Page 54: - 10.0 receive Data Interface Timing on Exception Conditions has been added.
Page 55: - Receive Data Timing Diagram on Exception Conditions has been added.
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