參數(shù)資料
型號: 82557
廠商: Intel Corp.
英文描述: Fast Ethernet PCI Bus Controller(快速以太網(wǎng) PCI總線控制器)
中文描述: 快速以太網(wǎng)PCI總線控制器(快速以太網(wǎng)的PCI總線控制器)
文件頁數(shù): 53/57頁
文件大?。?/td> 601K
代理商: 82557
INTEL 82557 FAST ETHERNET PCI BUS CONTROLLER
53
Device ID
Vendor ID
00h
Status
Command
04h
Class Code
Revision ID
08h
BIST
Header Type
Latency Timer
Cache Line Size
0Ch
*CSR Mem Mapped Base Addr Register
10h
CSR I/O Mapped Base Addr Register
14h
Flash Mem Mapped Base Addr Register
18h
Reserved Base Addr Register
1Ch
Reserved Base Addr Register
20h
Reserved Base Addr Register
24h
Reserved
28h
SubSystem ID
SubSystem Vendor ID
2Ch
Expansion ROM Base Addr
30h
Reserved
34h
Reserved
38h
Max_Lat
Min_Gnt
Interrupt Pin
Interrupt Line
3Ch
Figure 23. PCI Configuration Registers
8.2
SubSystem ID and SubSystem Vendor ID Support
The 82557C provides support for modifying the Device ID and Vendor ID fields in the PCI configuration space. It
also provides support for configurable SubSystem ID and SubSystem Vendor ID fields. Once the hardware reset
pin is deasserted, the 82557C automatically reads addresses Ah through Ch of the EEPROM. The first of these
16-bit values is used for controlling various 82557C functions. The second is the Device ID / SubSystem ID
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