Notes
79RC32438 User Reference Manual
i
November 4, 2002
Table of Contents
About This Manual
Introduction
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i
Content Summary
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i
Documentation Conventions and Definitions
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ii
Signal Terminology
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iii
Revision History
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iii
1 RC32438 Device
Overview
Introduction..................................................................................................................................1-1
Key Features ...............................................................................................................................1-1
System Block Diagram ................................................................................................................1-2
Additional Resources...................................................................................................................1-2
Feature List Summary .................................................................................................................1-2
System Identification....................................................................................................................1-5
Logic Diagram — RC32438.........................................................................................................1-7
Pin Characteristics.......................................................................................................................1-8
Pin Description...........................................................................................................................1-11
Default Memory Map .................................................................................................................1-20
RC32438 Internal Register Map................................................................................................1-21
2 MIPS32 4Kc Processor Core
Introduction..................................................................................................................................2-1
Functional Overview...................................................................................................................2-1
Features.......................................................................................................................................2-1
Functional Overview....................................................................................................................2-3
Blocks.................................................................................................................................2-3
Pipeline Description.....................................................................................................................2-6
Instruction Cache Miss.......................................................................................................2-8
Multiply/Divide Operations..................................................................................................2-9
MDU Pipeline.....................................................................................................................2-9
Branch Delay....................................................................................................................2-14
Data Bypassing................................................................................................................2-14
Interlock Handling.............................................................................................................2-16
Slip Conditions.................................................................................................................2-17
Instruction Interlocks........................................................................................................2-18
Instruction Hazards..........................................................................................................2-19
Memory Management................................................................................................................2-20
Modes of Operation..........................................................................................................2-21
Translation Lookaside Buffer............................................................................................2-27
Virtual to Physical Address Translation............................................................................2-31