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型號(hào)：	79RC32V333-133DH
英文描述：	8-pin, 1.5KB Flash Program, 64B Flash Data, 8MHz Internal Oscillator, -40C to +85C, 8-SOIC 150mil, T/R
中文描述：	微處理器
文件頁(yè)數(shù)：	404/654頁(yè)
文件大?。?/td>	6963K
代理商：	79RC32V333-133DH

IDT I2C Bus Interface

I2C Bus Master Interface

79RC32438 User Reference Manual

November 4, 2002

C Bus Master Status Register

Figure 15.12 I

C Bus Master Status Register (I2CMS)

Description:

When a value is written into this field, the corresponding command is initiated on the

C bus. Completion of the command is signalled when the done (D) bit in the I2CMS register is set.

Initial Value:

Previous command

Write Effect:

Initiate command on I

Description:

This bit is set when the command written to the I2CMCMD register has been completed

and the remaining status bits in this register are valid. At the completion of each command except

C bus SCL signal is held in a low state. This bit is automatically cleared when a com-

mand is written to the I2CMCMD register.

Initial Value:

Write Effect:

Description:

No Acknowledge.

At the completion of each data transfer initiated by the I

C bus master inter-

face, if there was a “no acknowledge” signal, this bit is set to one. If there was an “acknowledge”

signal, this bit is cleared to zero. The absence or presence of the acknowledge signal is recorded

in this bit whether the acknowledge signal comes from the I

C bus master interface or an external

slave. This bit is automatically cleared when a command is written to the I2CMCMD register.

Initial Value:

Write Effect:

Description:

Lost Arbitration.

Arbitration takes place during each byte transmitted by the I

C bus master inter-

face. If the I

C bus master interface transmits a HIGH level during a bit period while another mas-

ter transmits a LOW level, then the I

C bus master interface has lost arbitration. When this occurs,

this bit is set and the I

C bus master interface tri-states the SLC pin for the remainder of the byte

transfer. This bit is automatically cleared when a command is written to the I2CMCMD register.

Initial Value:

Write Effect:

相關(guān)PDF資料	PDF描述
79RC32V333-133DHI	Microprocessor
79RC32V333-150DH	8 PIN, 1.75KB, FLASH, 64B RAM, COMPARATOR, 8MHZ INTERNAL OSCILLATOR, -40C to +125C, 8-PDIP, TUBE
79RC32V333-150DHI	Microprocessor
79RC32V334-100BB	MICROPROCESSOR\|32-BIT\|BGA\|256PIN\|PLASTIC
79RC32V334-100BBI	MICROPROCESSOR\|32-BIT\|BGA\|256PIN\|PLASTIC

相關(guān)代理商/技術(shù)參數(shù)	參數(shù)描述
79RC32V333-133DHI	制造商:未知廠家制造商全稱:未知廠家功能描述:Microprocessor
79RC32V333-150DH	制造商:未知廠家制造商全稱:未知廠家功能描述:Microprocessor
79RC32V333-150DHI	制造商:未知廠家制造商全稱:未知廠家功能描述:Microprocessor
79RC32V334-100BB	制造商:未知廠家制造商全稱:未知廠家功能描述:MICROPROCESSOR\|32-BIT\|BGA\|256PIN\|PLASTIC
79RC32V334-100BBG	制造商:Integrated Device Technology Inc 功能描述:MPU RC32300 32-Bit 100MHz 3.3V 256-Pin BGA

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