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型號(hào)：	79RC32V333-133DH
英文描述：	8-pin, 1.5KB Flash Program, 64B Flash Data, 8MHz Internal Oscillator, -40C to +85C, 8-SOIC 150mil, T/R
中文描述：	微處理器
文件頁(yè)數(shù)：	164/654頁(yè)
文件大?。?/td>	6963K
代理商：	79RC32V333-133DH

IDT System Integrity Functions

Address Space Monitor

79RC32438 User Reference Manual

November 4, 2002

CPU Error Address Register

Figure 4.2 CPU Error Address Register (CEA)

The register address for CEA can be found in Chapter 3, Table 3.2.

Address Space Monitor

The address space monitor observes physical addresses in transactions generated by the CPU, PCI,

and DMA controller and generates an error if the address does not decode to a valid region within the

RC32438 memory map or if an address maps to two regions due to mis-configuration of a region’s base

and mask registers. Table 4.2 summarizes the methods used to report an undecoded address or redundant

mapping errors to the CPU, PCI, and DMA controller. The address space monitor is always enabled.

If an undecoded address error is detected during a single byte, half-word, or word DMA transfer, then

the CA field in the DMA descriptor is incremented by one byte, half-word, or word respectively and the

COUNT field is decremented accordingly. If an undecoded address error is detected in a burst DMA

transfer, then the COUNT and CA fields in the DMA descriptor are unmodified.

Description:

Watchdog Timer Warm Reset Enable.

When this bit is set and the watchdog timer times-out, a

warm reset is generated. When this bit is cleared, a warm reset is never generated due to a watch-

dog timer time-out.

0 - No warm reset on watchdog timer time-out

1 - Generate warm reset on watchdog timer time-out

Initial Value:

Previous value written

Write Effect:

Modify value

Description:

This field contains the physical address of the first CPU transaction which resulted in

an undecoded address error or slave acknowledge error. This register is only updated when an

undecoded address error or slave acknowledge error occurs if the ADDR field is all ones (i.e.,

0xFFFF_FFFF).

Initial Value:

Physical address of the last CPU transaction that resulted in undecoded address error or previ-

ous value written.

Write Effect:

Modify value

相關(guān)PDF資料	PDF描述
79RC32V333-133DHI	Microprocessor
79RC32V333-150DH	8 PIN, 1.75KB, FLASH, 64B RAM, COMPARATOR, 8MHZ INTERNAL OSCILLATOR, -40C to +125C, 8-PDIP, TUBE
79RC32V333-150DHI	Microprocessor
79RC32V334-100BB	MICROPROCESSOR\|32-BIT\|BGA\|256PIN\|PLASTIC
79RC32V334-100BBI	MICROPROCESSOR\|32-BIT\|BGA\|256PIN\|PLASTIC

相關(guān)代理商/技術(shù)參數(shù)	參數(shù)描述
79RC32V333-133DHI	制造商:未知廠家制造商全稱:未知廠家功能描述:Microprocessor
79RC32V333-150DH	制造商:未知廠家制造商全稱:未知廠家功能描述:Microprocessor
79RC32V333-150DHI	制造商:未知廠家制造商全稱:未知廠家功能描述:Microprocessor
79RC32V334-100BB	制造商:未知廠家制造商全稱:未知廠家功能描述:MICROPROCESSOR\|32-BIT\|BGA\|256PIN\|PLASTIC
79RC32V334-100BBG	制造商:Integrated Device Technology Inc 功能描述:MPU RC32300 32-Bit 100MHz 3.3V 256-Pin BGA

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