參數(shù)資料
型號: 28F320D18
廠商: Intel Corp.
英文描述: 1.8 Volt Intel Dual-Plane Flash Memory(1.8 V Intel 雙平面閃速存儲器)
中文描述: 1.8 V的英特爾雙平面閃存(1.8伏英特爾雙平面閃速存儲器)
文件頁數(shù): 81/83頁
文件大?。?/td> 836K
代理商: 28F320D18
28F320D18
Product Preview
77
NOTES:
1. The variable P is a pointer which is defined at CFI offset 15h.
2. For a 1-Mb 1.8 Volt Dual-Plane Flash memory, z
= 0100h = 256
256 * 256 = 64K, y
= 17h = 23d
y1+1
= 24
24 * 64K = 1MB
Partition 2’s offset is 0018 0000h bytes (000C 0000h words).
(P+3B)h
(P+33)h
Partition 2 (Erase Region 1) bits per cell
bits 0–3 = bits per cell in erase region
bit 4 = reserved for “internal ECC used” (1=yes, 0=no)
bits 5–7 = reserved for future use
Partition 2 (Erase Region 1) page mode and synchronous mode
capabilities as defined in
Table 19
.
bit 0 = page mode host reads permitted (1=yes, 0=no)
bit 1 = synchronous host reads permitted (1=yes, 0=no)
bit 2 = synchronous host writes permitted (1=yes, 0=no)
bits 3–7 = reserved for future use
Partition Region 2 Erase Block Region 2 Information
bits 0–15 = y, y+1 = number of identical-size erase blocks
bits 16–31 = z, region erase block(s) size are z x 256 bytes
(top parameter device only)
1
74:
6C:
(P+3C)h
(P+34)h
1
75:
6D:
(P+35)h
(P+36)h
(P+37)h
4
6E:
6F:
70:
(P+38)h
(P+39)h
71:
72:
Partition 2 (Erase Region 2) minimum block erase cycles x 1000
(top parameter device only)
Partition 2 (Erase Region 2) bits per cell (top parameter only)
bits 0–3 = bits per cell in erase region
bit 4 = reserved for “internal ECC used” (1=yes, 0=no)
bits 5–7 = reserved for future use
Partition 2 (Erase Region 2) page mode and synchronous mode
capabilities as defined in
Table 19
. (top parameter only
bit 0 = page mode host reads permitted (1=yes, 0=no)
bit 1 = synchronous host reads permitted (1=yes, 0=no)
bit 2 = synchronous host writes permitted (1=yes, 0=no)
bits 3–7 = reserved for future use
Features Space definitions (
reserved for future use
)
Reserved for future use
2
(P+3A)h
(P+3B)h
73:
74:
1
(P+3C)h
1
75:
(P+3D)h
(P+3E)h
(P+3D)h
(P+3E)h
TBD
Rsv'd
76:
77:
76:
77:
Partition Region 2 Information
Bottom
Offset
(1)
P = 39H
Top
Offset
(1)
P = 39H
Description
(Optional Flash Features and Commands)
See Table 24
Length
Address
Bottom
Top
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