參數(shù)資料
型號(hào): 28F320D18
廠商: Intel Corp.
英文描述: 1.8 Volt Intel Dual-Plane Flash Memory(1.8 V Intel 雙平面閃速存儲(chǔ)器)
中文描述: 1.8 V的英特爾雙平面閃存(1.8伏英特爾雙平面閃速存儲(chǔ)器)
文件頁(yè)數(shù): 36/83頁(yè)
文件大?。?/td> 836K
代理商: 28F320D18
28F320D18
32
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7.0
Design Considerations
This section will describe how to use and design with the 1.8 Volt Dual-Plane Flash memory. It will
focus on the dual partition architecture as well as the integrated features of the device.
Today’s high-performance CPUs and ASICs designed for portable and handheld applications place
relentless demands on memory for increased data transfer speeds, as well as very low power
operation. This requires a new memory approach to help bridge the performance gap between the
processor and memory. 1.8 Volt Dual-Plane Flash memory satisfies both of these requirements by
operating at 1.8 volts and also providing hardware simultaneous read-while-program/erase
capabilities through its dual partition architecture. It also supports two high-performance interfaces
(asynchronous page mode and synchronous burst mode at 40 MHz max) with zero wait states.
This section will cover these new features and how to implement them in designs using 1.8 Volt
Dual-Plane Flash memory. The following is a list of the key topics that will be covered:
Flash Hardware Design Considerations.
Flash Software Design Considerations.
System Design Considerations.
Design Tools and Software
For detailed device specifications and more information, refer to
Section 10.0
for a full list of
companion documents.
7.1
Flash Hardware Design Considerations
7.1.1
Flash Power Consumption
While in operation, the flash device consumes active power. Intel
Flash devices have power
saving features, Automatic Power Savings (APS) and standby modes that reduce overall memory
and system power consumption.
7.1.1.1
Active Power
With CE# at a logic-low level and RST# at a logic-high level, the device is in active mode. Only
one partition at a time is active if both partitions are in read mode. However, both partitions can be
active simultaneously if one is in read mode and the other is performing background program or
erase. The active “read” partition is selected when CE# is low and a valid partition address is
present. See
Table 2 on page 9
, for simultaneous commands allowed with dual partitions.
7.1.1.2
Using No-Wrap Mode
The burst wrap bit (RCR.3) of the Read Configuration Register determines whether 4- or 8-word
burst-accesses wrap within the burst-length boundary or whether they cross word-length
boundaries to perform linear accesses. No-wrap mode (RCR.3 = 1) enables WAIT# to hold off the
system processor, as it does in the continuous burst mode. In the no-wrap mode, the device
operates similar to continuous linear burst mode but consumes less power during 4- and 8-word
bursts. Set RCR.3 = 1 for lower power operation and non-wrapped linear bursts.
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