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參數(shù)資料
| 型號： | 28F128J3A |
| 廠商： | Intel Corp. |
| 英文描述： | 3 Volt Intel StrataFlash Memory(3 V 128M位Strata閃速存儲器) |
| 中文描述： | 3伏特英特爾StrataFlash存儲器（128兆位3伏地層的閃速存儲器） |
| 文件頁數(shù)： | 21/58頁 |
| 文件大?。?/td> | 574K |
| 代理商： | 28F128J3A |
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28F128J3A, 28F640J3A, 28F320J3A
PRODUCT PREVIEW
15
NOTES:
1. Refer to the Query Structure Output section and offset 28h for the detailed definition of offset address as a
function of device bus width and mode.
2.
BA = Block Address beginning location (i.e., 02000h is block 2’s beginning location when the block size is
128 Kbyte).
3. Offset 15 defines “P” which points to the
Primary Intel-Specific Extended Query
Table.
4.2.3
BLOCK STATUS REGISTER
The block status register indicates whether an erase operation completed successfully or whether a
given block is locked or can be accessed for flash program/erase operations.
Block Erase Status (BSR.1) allows system software to determine the success of the last block erase
operation. BSR.1 can be used just after power-up to verify that the V
supply was not accidentally
removed during an erase operation. This bit is only reset by issuing another erase operation to the
block. The block status register is accessed from word address 02h within each block.
NOTE:
1. BA = The beginning location of a Block Address (i.e., 008000h is block 1’s (64-KB block) beginning location
in word mode).
4.2.4
CFI QUERY IDENTIFICATION STRING
The CFI Query Identification String provides verification that the component supports the
Common Flash Interface specification.
It also indicates the specification version and supported
vendor-specified command set(s).
Table 7. Query Structure
Offset
Sub-Section Name
Description
00h
01h
Manufacturer Code
Device Code
Block-Specific Information
Reserved for Vendor-Specific Information
Reserved for Vendor-Specific Information
Command Set ID and Vendor Data Offset
Flash Device Layout
Vendor-Defined Additional Information Specific to the
Primary Vendor Algorithm
(BA+2)h
(2)
04-0Fh
10h
1Bh
27h
Block Status Register
Reserved
CFI Query Identification String
System Interface Information
Device Geometry Definition
Primary Intel-Specific Extended
Query Table
P
(3)
Table 8. Block Status Register
Offset
(BA+2)h
(1)
Length
1
Description
Address
BA+2:
Value
--00 or --01
Block Lock Status Register
BSR.0 Block Lock Status
0 = Unlocked
1 = Locked
BSR.1 Block Erase Status
0 = Last erase operation completed successfully
1 = Last erase operation did not complete successfully
BSR 2–7:
Reserved for Future Use
BA+2:
(bit 0): 0 or 1
BA+2:
(bit 1): 0 or 1
BA+2:
(bit 2–7): 0
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 28F320J3A | 3 Volt Intel StrataFlash Memory(3 V 32M位英特爾StrataFlash存儲器) |
| 28F640J3A | 3 Volt Intel StrataFlash Memory(3 V 64M位英特爾StrataFlash存儲器) |
| 28F128 | 3 Volt Intel StrataFlash Memory |
| 28F1602C3 | 3 Volt Advanced+ Stacked Chip Scale Package Memory(3V閃速存儲器和靜態(tài)存儲器) |
| 28F3204C3 | 3 V Advanced+ Stacked Chip Scale Package Memory(3V高級堆芯片封裝存儲器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 28F128J3A150 | 制造商: 功能描述: 制造商:INTELC 功能描述: 制造商:undefined 功能描述: |
| 28F128J3A-150 | 制造商: 功能描述: 制造商:undefined 功能描述: |
| 28F128J3D75 | 制造商: 功能描述: 制造商:Intel 功能描述: |
| 28F128J3FS-12ET | 制造商: 功能描述: 制造商:undefined 功能描述: |
| 28F128L18 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:StrataFlash Wireless Memory |
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