參數(shù)資料
型號： 28233-11
廠商： CONEXANT SYSTEMS
元件分類： 數(shù)字傳輸電路
英文描述： ATM Transmitter/Receiver with UTOPIA Interface
中文描述： TRANSCEIVER, PQFP160
封裝： PLASTIC, MQFP-160
文件頁數(shù)： 51/161頁
文件大小： 1832K
代理商： 28233-11
are not internally generated are obtained from the external interface.
Section 2.3.1
,
Section 2.3.2
,
Section 2.3.3
, and
Section 2.3.4
describe internally
generated octets.
In STS-1 mode, there are four clock pulses on TOVH_CLK for each row in
the framing format (a total of 36 clock pulses per frame). The Synchronous
Payload Envelope (SPE) starts immediately after the row 1 overhead (the J1 octet
follows the C1 octet). TMRKR is high during row 1 of the framing format (octets
A1, A2, C1, J1). STS-3c/STM-1 mode has the same format except there are 10
clock pulses for each row for a total of 90 clock pulses per frame.
In STS-1/STS-3c/STM-1 modes, the content of octets D1, D2, and D3 is from
the internal HDLC formatter, if enabled. These octets can also be provided via the
TXOVH[7:0] input.
In G.832 E3 mode, there is a total of 7 clock pulses per frame and TMRKR is
high during the FA1 and FA2 octets. In G.832 E4 mode, there is a total of 16 clock
pulses per frame, and TMRKR is again high during the FA1 and FA2 octets. The
TXOVH[7:0] inputs should be connected to ground if all 0s octet data is desired
for octets that are not internally generated.
CN8223
2.0 Functional Description
ATM Transmitter/Receiver with UTOPIA Interface
2.3 Overhead Generation
100046C
Conexant
2-17
2.3.5 Transmit Framing Overhead Interface
An octet interface is available for external insertion of certain framing overhead
in STS-1/STS-3c/STM-1 and G.832 E3/E4 framing modes. The interface consists
of an output clock on TOVH_CLK, an output marker on TMRKR, and an 8-bit
input bus for overhead octets.
The timing for this interface is
illustrated
in
Figure 2-12
.
There is a clock pulse on the TOVH_CLK output for each overhead octet that
appears in the framing format and that is provided on the bus input. The bus input
is sampled on the falling edge of the TOVH_CLK signal. TMRKR is high on a
particular octet in each mode to synchronize external circuitry.
All overhead octets can be provided by external insertion if Enable External
Overhead [bit 15] in CONFIG_2 [0x01] is set. If this bit is not set, only octets that
Figure 2-12. Transmit Framing Overhead Interface Timing
TOVH_CLK
TMRKR
A1
A2
C1
J1
TXOVH[7:0]
8
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