參數(shù)資料
型號： 28233-11
廠商： CONEXANT SYSTEMS
元件分類： 數(shù)字傳輸電路
英文描述： ATM Transmitter/Receiver with UTOPIA Interface
中文描述： TRANSCEIVER, PQFP160
封裝： PLASTIC, MQFP-160
文件頁數(shù)： 45/161頁
文件大?。?/td> 1832K
代理商： 28233-11
CN8223
2.0 Functional Description
ATM Transmitter/Receiver with UTOPIA Interface
2.2 Line Framers
100046C
Conexant
2-11
Figure 2-10
illustrates the transmit timing for the E3 interface. TXCKI has a
frequency of 34.368 MHz. TXSYI has a rising edge after the sampling of the last
bit of the frame alignment signal. TXDATO is the output signal; it transitions in
response to the falling edge of TXCKI, and can be sampled on the following
falling edge. This timing is compatible with the Conexant Bt8330B DS3/E3
framer using the TXOVH output. The frame alignment signal position is filled
with the value 0xCCCC. This value provides the four overhead bits (required by
ETSI prETS 300 214) that follow the frame alignment signal defined by ITU
G.751.
2.2.4 Externally Framed Receive Line Interface
The CN8223 external receive line interface has three inputs: clock, data, and
frame sync. Frame sync can be a multiple of the frame period.
Table 2-7
lists the
receiver connections for all external framing modes. The receive line inputs
consist of the receive clock (RXCKI), the receive sync input (RXSYI), and the
receive data input (RXDATI) when the external framer mode is selected.
Figure 2-10. E3 Interface Transmit Timing
Frame Alignment Signal Position
TXCKI
TXSYI
TXDATO
X
1
1
0
0
Information Field
X
X
X
X
X
X
X
X
X
8
Table 2-7. External Framing Mode Receiver Connections
Signal Name
Connect to CN8223 Pin
Receive Clock Input (RXCKI)
RXCKI
Receive Sync Input (RXSYI)
RXIN[3]
Receive Data Input (RXDATI)
RXIN[0]
Receive Loss of Signal (RXLOS~)
RXIN[4]
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