CN8223
3.0 Registers
ATM Transmitter/Receiver with UTOPIA Interface
3.7 Status Register Overview
100046C
Conexant
3-31
Set when PLCP OOF is active for eight consecutive PLCP frames. Not used in direct mapping
mode.
Table 3-13
provides definitions for the DS3 PLCP and Direct Mapping Mode LINE_STATUS bits.
Table 3-13. DS3 PLCP and Direct Mapping Mode LINE_STATUS Bit Definitions
Bit
Name
Description
15
0
Not used
14
One-Second Count
Set if the one-second timer input is detected.
13
PLCP Invalid FEBE
Set if an invalid FEBE is detected (9
–
F) in the G1 octet in 57-octet PLCP formats. Not used in
direct mapping mode.
12
PLCP FEBE All-1s
Set if an invalid FEBE = F is detected in the G1 octet in 57-octet PLCP formats. Not used in
direct mapping mode.
11
PLCP FEBE Error
Set if any valid non-0 FEBE value (values 0x1
–
0x8) is detected in the G1 octet in 57-octet PLCP
formats. Not used in direct mapping mode.
10
PLCP BIP Error
Set if there is an error in the BIP-8 code (B1 octet) checking in 57-octet PLCP formats. Not
used in Direct Mapping mode.
9
PLCP Frame Error
Set if there is an error in either the A1 or A2 octets of the PLCP frame pattern for 57-octet
PLCP formats. Not used in direct mapping mode.
8
PLCP Yellow/LOC
In PLCP mode, PLCP yellow indicates that the yellow alarm bit in the G1 octet (57-octet
modes) has been active for 10 consecutive PLCP frames. This bit will also be active for
57-octet formats using external framers or the parallel interface.
In Direct Mapping mode, LOC indicates that HEC cell delineation has been lost. Cell
delineation is lost if seven consecutive HEC errors occur at the current cell delineation
position.This bit will be active for 53-octet formats using external framers or the parallel
interface. (This bit is functionally redundant with bit 5 when configured in this mode).
7
PLCP LOF 2
–
3
Set if PLCP LOF is high for three consecutive one-second latching signals (rising edge on
ONESECI). Not used in direct mapping mode.
6
PLCP LOF
5
PLCP OOF/LOC
Set if the PLCP OOF state has been entered for 57-octet PLCP formats. In direct mapping
mode, it indicates that HEC cell delineation has been lost. Cell delineation is lost if seven
consecutive HEC errors occur at the current cell delineation position. (This bit is functionally
redundant with bit 8 when configured in Direct Mapping mode.)
4
DS3 X-bit Yellow
Set if the internal DS3 framer detects both X1 and X2 low in an M-frame.
3
DS3 Idle Code
Indicates that the internal DS3 framer has detected an idle code signal. A DS3 idle code is a
1100... payload with valid framing and parity, equal X bits, and all subframe 3 C bits set to 0.
2
DS3 AIS
Indicates that the internal DS3 framer has detected an AIS. A DS3 AIS is a 1010... payload with
valid framing and parity, equal X bits, and all C bits set to 0.
1
DS3 OOF
Indicates that the internal DS3 framer has lost frame alignment. An OOF condition for DS3
occurs when 3 out of 16 F bits are in error, or 2 out of 3 M-frames contain M bit errors.
Reframe time is typically 1 ms.
0
LOS (Input)
Set if there is a LOS detected by the internal B3ZS/HDB3 decoder, or if the RXLOS~ input pin is
active low. Internal LOS detection is the occurrence of 175
±
75 zeros prior to B3ZS/HDB3
decoding. The RXLOS~ input pin (RXIN[4]) should be tied high unless an external line
interface unit provides an active low LOS indication.