參數(shù)資料
型號： 28233-11
廠商： CONEXANT SYSTEMS
元件分類： 數(shù)字傳輸電路
英文描述： ATM Transmitter/Receiver with UTOPIA Interface
中文描述： TRANSCEIVER, PQFP160
封裝： PLASTIC, MQFP-160
文件頁數(shù)： 12/161頁
文件大?。?/td> 1832K
代理商： 28233-11
1.0 Product Description
CN8223
1.1 Block Diagram
ATM Transmitter/Receiver with UTOPIA Interface
1-2
Conexant
100046C
Figure 1-1. CN8223 Detailed Block Diagram
Port 1 Ctrl
Port 2 Ctrl
Port 3 Ctrl
UTOPIA Ctrl
Port 0 Ctrl
DS3, E3, E4, STS-1
STS-3c, STM-1
G.832
Transmit Framer
DS3, E3, E4, STS-1
STS-3c, STM-1
G.832
Receive Framer
Microprocessor
Interface
Transmit G.832
and PLCP
Framer
Rx
HDLC
Tx
FEAC
Tx
HDLC
Tx Cell
Generation,
Tx Rate
and Priority
Rx Cell
Validation
Rx VPI/VCI
Screening
4-Port
FIFO
Data
Interface
9
9
Tx
Overhead
Insert
Rx
Overhead
Extract
Line
Interfaces
9
9
Parallel
Interface
High
Speed
Medium
Speed
8
RXOVH
TXOVH
RMRKR
ROVH_CLK
TMRKR
TOVH_CLK
A[7:1]
PRCLK
CS~
AS~
W/R~
OE~
SEL8BIT
FDAT_IN
FDAT_OUT
FCTRL_OUT[16:0]
FCTRL_IN[7:0]
TCLKO_HS
±
TXOUT_HS
±
TXCKI_HS
±
RXCKI_HS
±
RXIN_HS
±
TCLKO
TXOUT
TXCKI
RXCKI
RXIN
TXOUT[7:0]
RXIN[7:0]
RCV_HLD
LOCD
Clock and
Control
ONESECI
8KCKI
NTEST
TEST1, 3
RESET
Line Framer Section
Cell Processing
Section
FIFO Data Ports Section
16
Receive G.832
and PLCP
Framer
8
UTOPIA
Interface
and
4-Cell
Buffers
Rx
FEAC
8
Cell Counters
Performance
Monitoring
Interrupt Control
CN8223
DL_INT
STAT_INT
D[15:0]
ONESECO
8
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